
Terrell W. Fears
Examiner (ID: 19115)
| Most Active Art Unit | 2303 |
| Art Unit(s) | 2312, 2811, 2511, 2303, 2305, 2824, 1613, 2818, 2504, 2603, 2899 |
| Total Applications | 1964 |
| Issued Applications | 1841 |
| Pending Applications | 23 |
| Abandoned Applications | 100 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3891892
[patent_doc_number] => 05798975
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-25
[patent_title] => 'Restore function for memory cells using negative bitline-selection'
[patent_app_type] => 1
[patent_app_number] => 8/782204
[patent_app_country] => US
[patent_app_date] => 1997-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5098
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[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/798/05798975.pdf
[firstpage_image] =>[orig_patent_app_number] => 782204
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/782204 | Restore function for memory cells using negative bitline-selection | Jan 9, 1997 | Issued |
Array
(
[id] => 3900735
[patent_doc_number] => 05777927
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/779835
[patent_app_country] => US
[patent_app_date] => 1997-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[firstpage_image] =>[orig_patent_app_number] => 779835
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/779835 | Semiconductor memory | Jan 6, 1997 | Issued |
Array
(
[id] => 3697338
[patent_doc_number] => 05696728
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-09
[patent_title] => 'Negative voltage level shift circuit'
[patent_app_type] => 1
[patent_app_number] => 8/778802
[patent_app_country] => US
[patent_app_date] => 1997-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2839
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[pdf_file] => patents/05/696/05696728.pdf
[firstpage_image] =>[orig_patent_app_number] => 778802
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/778802 | Negative voltage level shift circuit | Jan 2, 1997 | Issued |
Array
(
[id] => 3752234
[patent_doc_number] => 05787045
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-28
[patent_title] => 'Internal address generator of semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/777206
[patent_app_country] => US
[patent_app_date] => 1996-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8273
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[pdf_file] => patents/05/787/05787045.pdf
[firstpage_image] =>[orig_patent_app_number] => 777206
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777206 | Internal address generator of semiconductor memory device | Dec 26, 1996 | Issued |
Array
(
[id] => 3993767
[patent_doc_number] => 05910911
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-08
[patent_title] => 'Semiconductor memory and process of operating the same'
[patent_app_type] => 1
[patent_app_number] => 8/774907
[patent_app_country] => US
[patent_app_date] => 1996-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
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[pdf_file] => patents/05/910/05910911.pdf
[firstpage_image] =>[orig_patent_app_number] => 774907
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/774907 | Semiconductor memory and process of operating the same | Dec 26, 1996 | Issued |
Array
(
[id] => 3953493
[patent_doc_number] => 05973979
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Low supply voltage negative charge pump'
[patent_app_type] => 1
[patent_app_number] => 8/774307
[patent_app_country] => US
[patent_app_date] => 1996-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/973/05973979.pdf
[firstpage_image] =>[orig_patent_app_number] => 774307
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/774307 | Low supply voltage negative charge pump | Dec 25, 1996 | Issued |
Array
(
[id] => 3898817
[patent_doc_number] => 05724290
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-03
[patent_title] => 'Method and programming device for detecting an error in a memory'
[patent_app_type] => 1
[patent_app_number] => 8/774110
[patent_app_country] => US
[patent_app_date] => 1996-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2677
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[pdf_file] => patents/05/724/05724290.pdf
[firstpage_image] =>[orig_patent_app_number] => 774110
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/774110 | Method and programming device for detecting an error in a memory | Dec 23, 1996 | Issued |
Array
(
[id] => 3892662
[patent_doc_number] => 05748554
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-05
[patent_title] => 'Memory and method for sensing sub-groups of memory elements'
[patent_app_type] => 1
[patent_app_number] => 8/771303
[patent_app_country] => US
[patent_app_date] => 1996-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3730
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[pdf_file] => patents/05/748/05748554.pdf
[firstpage_image] =>[orig_patent_app_number] => 771303
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/771303 | Memory and method for sensing sub-groups of memory elements | Dec 19, 1996 | Issued |
Array
(
[id] => 3844426
[patent_doc_number] => 05761118
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Programming apparatus for analog storage media'
[patent_app_type] => 1
[patent_app_number] => 8/768701
[patent_app_country] => US
[patent_app_date] => 1996-12-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/761/05761118.pdf
[firstpage_image] =>[orig_patent_app_number] => 768701
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/768701 | Programming apparatus for analog storage media | Dec 17, 1996 | Issued |
Array
(
[id] => 3738476
[patent_doc_number] => 05671179
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Low power pulse generator for smart voltage flash eeprom'
[patent_app_type] => 1
[patent_app_number] => 8/764666
[patent_app_country] => US
[patent_app_date] => 1996-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
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[pdf_file] => patents/05/671/05671179.pdf
[firstpage_image] =>[orig_patent_app_number] => 764666
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/764666 | Low power pulse generator for smart voltage flash eeprom | Dec 10, 1996 | Issued |
Array
(
[id] => 3804555
[patent_doc_number] => 05726941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/762903
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[patent_app_date] => 1996-12-10
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/726/05726941.pdf
[firstpage_image] =>[orig_patent_app_number] => 762903
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/762903 | Semiconductor integrated circuit | Dec 9, 1996 | Issued |
Array
(
[id] => 3775090
[patent_doc_number] => 05844854
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Programmable logic device with two dimensional memory addressing'
[patent_app_type] => 1
[patent_app_number] => 8/759304
[patent_app_country] => US
[patent_app_date] => 1996-12-02
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[pdf_file] => patents/05/844/05844854.pdf
[firstpage_image] =>[orig_patent_app_number] => 759304
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/759304 | Programmable logic device with two dimensional memory addressing | Dec 1, 1996 | Issued |
Array
(
[id] => 3707019
[patent_doc_number] => 05677891
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[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Circuitry and method that allows for external control of a data security device'
[patent_app_type] => 1
[patent_app_number] => 8/756565
[patent_app_country] => US
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[pdf_file] => patents/05/677/05677891.pdf
[firstpage_image] =>[orig_patent_app_number] => 756565
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/756565 | Circuitry and method that allows for external control of a data security device | Nov 25, 1996 | Issued |
Array
(
[id] => 3853888
[patent_doc_number] => 05745418
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[patent_issue_date] => 1998-04-28
[patent_title] => 'Flash memory mass storage system'
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[pdf_file] => patents/05/745/05745418.pdf
[firstpage_image] =>[orig_patent_app_number] => 756304
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/756304 | Flash memory mass storage system | Nov 24, 1996 | Issued |
Array
(
[id] => 3853624
[patent_doc_number] => 05745402
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[patent_kind] => NA
[patent_issue_date] => 1998-04-28
[patent_title] => 'Ferroelectric non-volatile memory'
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[patent_app_number] => 8/755403
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[firstpage_image] =>[orig_patent_app_number] => 755403
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/755403 | Ferroelectric non-volatile memory | Nov 21, 1996 | Issued |
Array
(
[id] => 3843915
[patent_doc_number] => 05740118
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[firstpage_image] =>[orig_patent_app_number] => 754805
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Array
(
[id] => 3898843
[patent_doc_number] => 05724291
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[patent_title] => 'Semiconductor memory device with reduced chip area'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/754410 | Semiconductor memory device with reduced chip area | Nov 20, 1996 | Issued |
Array
(
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[patent_issue_date] => 1999-08-17
[patent_title] => 'Information transmission system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/751370 | Information transmission system | Nov 18, 1996 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/751910 | Multi-port memory cells and memory with parallel data initialization | Nov 17, 1996 | Issued |
Array
(
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[firstpage_image] =>[orig_patent_app_number] => 749409
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/749409 | Repeater with threshold modulation | Nov 14, 1996 | Issued |