Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18781291 [patent_doc_number] => 11823035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Power-efficient compute-in-memory pooling [patent_app_type] => utility [patent_app_number] => 16/922953 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6785 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16922953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/922953
Power-efficient compute-in-memory pooling Jul 6, 2020 Issued
Array ( [id] => 16951448 [patent_doc_number] => 20210210140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => METHOD AND SYSTEM FOR RELIABLE AND SECURE MEMORY ERASE [patent_app_type] => utility [patent_app_number] => 16/919177 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919177 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919177
Method and system for reliable and secure memory erase Jul 1, 2020 Issued
Array ( [id] => 16958904 [patent_doc_number] => 11062781 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-13 [patent_title] => Equalizer circuit, memory storage device and signal adjustment method [patent_app_type] => utility [patent_app_number] => 16/916137 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5597 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916137 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916137
Equalizer circuit, memory storage device and signal adjustment method Jun 29, 2020 Issued
Array ( [id] => 16379091 [patent_doc_number] => 20200327934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => REFLOW PROTECTION [patent_app_type] => utility [patent_app_number] => 16/915537 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16915537 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/915537
Reflow protection Jun 28, 2020 Issued
Array ( [id] => 17002345 [patent_doc_number] => 11081167 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Sense amplifier architecture for low supply voltage operations [patent_app_type] => utility [patent_app_number] => 16/912716 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 14086 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912716 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912716
Sense amplifier architecture for low supply voltage operations Jun 25, 2020 Issued
Array ( [id] => 16379090 [patent_doc_number] => 20200327933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => Multi-Level Cell Programming Using Optimized Multiphase Mapping With Balanced Gray Code [patent_app_type] => utility [patent_app_number] => 16/912588 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912588
Multi-level cell programming using optimized multiphase mapping with balanced gray code Jun 24, 2020 Issued
Array ( [id] => 16795845 [patent_doc_number] => 20210125662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => POWER MANAGEMENT CIRCUIT IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/907328 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16907328 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/907328
Power management circuit in memory device Jun 21, 2020 Issued
Array ( [id] => 16845737 [patent_doc_number] => 11017830 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-25 [patent_title] => Ferroelectric memories [patent_app_type] => utility [patent_app_number] => 16/907101 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3616 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16907101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/907101
Ferroelectric memories Jun 18, 2020 Issued
Array ( [id] => 16928070 [patent_doc_number] => 11049559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-29 [patent_title] => Subthreshold voltage forming of selectors in a crosspoint memory array [patent_app_type] => utility [patent_app_number] => 16/899423 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 8046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/899423
Subthreshold voltage forming of selectors in a crosspoint memory array Jun 10, 2020 Issued
Array ( [id] => 17165941 [patent_doc_number] => 11152049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-19 [patent_title] => Differential sensing for a memory device [patent_app_type] => utility [patent_app_number] => 16/895956 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 19840 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895956 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/895956
Differential sensing for a memory device Jun 7, 2020 Issued
Array ( [id] => 16928044 [patent_doc_number] => 11049533 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-29 [patent_title] => Semiconductor system and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/874359 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13721 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874359 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874359
Semiconductor system and semiconductor device May 13, 2020 Issued
Array ( [id] => 17231988 [patent_doc_number] => 20210358545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => PASSIVE COMPENSATION FOR ELECTRICAL DISTANCE [patent_app_type] => utility [patent_app_number] => 15/931080 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15931080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/931080
Passive compensation for electrical distance May 12, 2020 Issued
Array ( [id] => 16759594 [patent_doc_number] => 10978149 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-13 [patent_title] => Resistive memory apparatus and adjusting method for write-in voltage thereof [patent_app_type] => utility [patent_app_number] => 16/872374 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3499 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872374 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872374
Resistive memory apparatus and adjusting method for write-in voltage thereof May 11, 2020 Issued
Array ( [id] => 16455780 [patent_doc_number] => 20200365206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/930046 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930046 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/930046
Semiconductor device May 11, 2020 Issued
Array ( [id] => 16455772 [patent_doc_number] => 20200365198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/930078 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930078 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/930078
Semiconductor memory device May 11, 2020 Issued
Array ( [id] => 17107233 [patent_doc_number] => 11127458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-21 [patent_title] => Non-uniform state spacing in multi-state memory element for low-power operation [patent_app_type] => utility [patent_app_number] => 16/861204 [patent_app_country] => US [patent_app_date] => 2020-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 10950 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/861204
Non-uniform state spacing in multi-state memory element for low-power operation Apr 27, 2020 Issued
Array ( [id] => 16578441 [patent_doc_number] => 20210012842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => METHOD AND CIRCUIT FOR PROVIDING AUXILIARY POWER AND STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/846648 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846648
Method and circuit for providing auxiliary power and storage device including the same Apr 12, 2020 Issued
Array ( [id] => 16637321 [patent_doc_number] => 10915832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Constructing and programming quantum hardware for robust quantum annealing processes [patent_app_type] => utility [patent_app_number] => 16/841251 [patent_app_country] => US [patent_app_date] => 2020-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841251 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/841251
Constructing and programming quantum hardware for robust quantum annealing processes Apr 5, 2020 Issued
Array ( [id] => 16378559 [patent_doc_number] => 20200327401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => COMPUTING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/838495 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838495 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838495
Computing circuitry for configuration and operation of cells and arrays comprising memristor elements Apr 1, 2020 Issued
Array ( [id] => 17115313 [patent_doc_number] => 20210295910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => MEMORY OPERATION WITH DOUBLE-SIDED ASYMMETRIC DECODERS [patent_app_type] => utility [patent_app_number] => 16/824104 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16824104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/824104
Memory operation with double-sided asymmetric decoders Mar 18, 2020 Issued
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