Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15487961 [patent_doc_number] => 10559335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Method of training drive strength, ODT of memory device, computing system performing the same and system-on-chip performing the same [patent_app_type] => utility [patent_app_number] => 16/116369 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16116369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/116369
Method of training drive strength, ODT of memory device, computing system performing the same and system-on-chip performing the same Aug 28, 2018 Issued
Array ( [id] => 15702985 [patent_doc_number] => 10607679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Memory device and refreshing method thereof [patent_app_type] => utility [patent_app_number] => 16/115569 [patent_app_country] => US [patent_app_date] => 2018-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9158 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16115569 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/115569
Memory device and refreshing method thereof Aug 28, 2018 Issued
Array ( [id] => 14445909 [patent_doc_number] => 20190180828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => SEMICONDUCTOR MEMORY DEVICE, MANUFACTURING METHOD THEREOF AND OUTPUT METHOD OF DATA STROBE SIGNAL [patent_app_type] => utility [patent_app_number] => 16/111219 [patent_app_country] => US [patent_app_date] => 2018-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16111219 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/111219
Semiconductor memory device, manufacturing method thereof and output method of data strobe signal Aug 23, 2018 Issued
Array ( [id] => 15532109 [patent_doc_number] => 20200058360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => Floating Boosted Pre-Charge Scheme for Sense Amplifiers [patent_app_type] => utility [patent_app_number] => 16/104001 [patent_app_country] => US [patent_app_date] => 2018-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16104001 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/104001
Floating boosted pre-charge scheme for sense amplifiers Aug 15, 2018 Issued
Array ( [id] => 14752511 [patent_doc_number] => 20190259429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => MEMORY DEVICE DETERMINING OPERATION MODE BASED ON EXTERNAL VOLTAGE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/103261 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103261 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103261
Memory device determining operation mode based on external voltage and method of operating the same Aug 13, 2018 Issued
Array ( [id] => 15375375 [patent_doc_number] => 10529413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Semiconductor device and method for driving semiconductor device [patent_app_type] => utility [patent_app_number] => 16/103157 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 81 [patent_no_of_words] => 36673 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 409 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103157
Semiconductor device and method for driving semiconductor device Aug 13, 2018 Issued
Array ( [id] => 14572899 [patent_doc_number] => 20190214057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/103059 [patent_app_country] => US [patent_app_date] => 2018-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16103059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/103059
Semiconductor device with memory banks and sense amplifier arrays Aug 13, 2018 Issued
Array ( [id] => 14984589 [patent_doc_number] => 10446214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-15 [patent_title] => Sense amplifier with split capacitors [patent_app_type] => utility [patent_app_number] => 16/102053 [patent_app_country] => US [patent_app_date] => 2018-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 19335 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16102053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/102053
Sense amplifier with split capacitors Aug 12, 2018 Issued
Array ( [id] => 14366429 [patent_doc_number] => 10304526 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Semiconductor integrated circuit device and system [patent_app_type] => utility [patent_app_number] => 16/059255 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 37 [patent_no_of_words] => 29469 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16059255 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/059255
Semiconductor integrated circuit device and system Aug 8, 2018 Issued
Array ( [id] => 13613055 [patent_doc_number] => 20180358077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => FERROELECTRIC MEMORY CELL SENSING [patent_app_type] => utility [patent_app_number] => 16/059727 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16059727 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/059727
Ferroelectric memory cell sensing Aug 8, 2018 Issued
Array ( [id] => 15461411 [patent_doc_number] => 20200043530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => BANK AND CHANNEL STRUCTURE OF STACKED SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/051445 [patent_app_country] => US [patent_app_date] => 2018-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16051445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/051445
Bank and channel structure of stacked semiconductor device Jul 30, 2018 Issued
Array ( [id] => 15061023 [patent_doc_number] => 10460823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Test control circuit, semiconductor memory apparatus and semiconductor system using the test control circuit [patent_app_type] => utility [patent_app_number] => 16/037631 [patent_app_country] => US [patent_app_date] => 2018-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6542 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16037631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/037631
Test control circuit, semiconductor memory apparatus and semiconductor system using the test control circuit Jul 16, 2018 Issued
Array ( [id] => 17847706 [patent_doc_number] => 11437090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Negative differential resistance circuits [patent_app_type] => utility [patent_app_number] => 16/036751 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5007 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16036751 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/036751
Negative differential resistance circuits Jul 15, 2018 Issued
Array ( [id] => 13542773 [patent_doc_number] => 20180322933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => MEMORY DEVICES AND APPARATUS CONFIGURED TO APPLY POSITIVE VOLTAGE LEVELS TO DATA LINES FOR MEMORY CELLS SELECTED FOR AND INHIBITED FROM PROGRAMMING [patent_app_type] => utility [patent_app_number] => 16/035857 [patent_app_country] => US [patent_app_date] => 2018-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16035857 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/035857
Memory devices and apparatus configured to apply positive voltage levels to data lines for memory cells selected for and inhibited from programming Jul 15, 2018 Issued
Array ( [id] => 15611043 [patent_doc_number] => 10586588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-10 [patent_title] => Reversing the effects of hot carrier injection and bias threshold instability in SRAMs [patent_app_type] => utility [patent_app_number] => 16/030737 [patent_app_country] => US [patent_app_date] => 2018-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 12736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16030737 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/030737
Reversing the effects of hot carrier injection and bias threshold instability in SRAMs Jul 8, 2018 Issued
Array ( [id] => 16067219 [patent_doc_number] => 10692569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Read-out techniques for multi-bit cells [patent_app_type] => utility [patent_app_number] => 16/028415 [patent_app_country] => US [patent_app_date] => 2018-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 9720 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16028415 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/028415
Read-out techniques for multi-bit cells Jul 5, 2018 Issued
Array ( [id] => 14985265 [patent_doc_number] => 10446554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Semiconductor memory device and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/027267 [patent_app_country] => US [patent_app_date] => 2018-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6367 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16027267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/027267
Semiconductor memory device and method of forming the same Jul 3, 2018 Issued
Array ( [id] => 14707577 [patent_doc_number] => 10381551 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Spin orbit torque magnetoresistive random access memory containing shielding element and method of making thereof [patent_app_type] => utility [patent_app_number] => 16/024521 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5570 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024521
Spin orbit torque magnetoresistive random access memory containing shielding element and method of making thereof Jun 28, 2018 Issued
Array ( [id] => 13558485 [patent_doc_number] => 20180330790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Including Resistance Change Material and Method of Operating [patent_app_type] => utility [patent_app_number] => 16/017249 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017249 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/017249
Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating Jun 24, 2018 Issued
Array ( [id] => 14917563 [patent_doc_number] => 10430101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Semiconductor memory device that randomizes data and randomizer thereof [patent_app_type] => utility [patent_app_number] => 15/925617 [patent_app_country] => US [patent_app_date] => 2018-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15925617 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/925617
Semiconductor memory device that randomizes data and randomizer thereof Mar 18, 2018 Issued
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