Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11883499 [patent_doc_number] => 09754680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Method and device for compact eFuse array' [patent_app_type] => utility [patent_app_number] => 15/336365 [patent_app_country] => US [patent_app_date] => 2016-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15336365 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/336365
Method and device for compact eFuse array Oct 26, 2016 Issued
Array ( [id] => 12195673 [patent_doc_number] => 09899409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Nonvolatile memory device having pad structure for high speed operation' [patent_app_type] => utility [patent_app_number] => 15/335482 [patent_app_country] => US [patent_app_date] => 2016-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7854 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15335482 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/335482
Nonvolatile memory device having pad structure for high speed operation Oct 26, 2016 Issued
Array ( [id] => 12392838 [patent_doc_number] => 09965194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Data writing method, memory control circuit unit and memory storage apparatus which performs data arrangement operation according to usage frequency of physical erasing unit of memory storage apparatus [patent_app_type] => utility [patent_app_number] => 15/333197 [patent_app_country] => US [patent_app_date] => 2016-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 9226 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15333197 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/333197
Data writing method, memory control circuit unit and memory storage apparatus which performs data arrangement operation according to usage frequency of physical erasing unit of memory storage apparatus Oct 24, 2016 Issued
Array ( [id] => 12019495 [patent_doc_number] => 09812203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating' [patent_app_type] => utility [patent_app_number] => 15/292098 [patent_app_country] => US [patent_app_date] => 2016-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 16104 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292098 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292098
Semiconductor memory having both volatile and non-volatile functionality including resistance change material and method of operating Oct 11, 2016 Issued
Array ( [id] => 11958047 [patent_doc_number] => 20170262199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/286751 [patent_app_country] => US [patent_app_date] => 2016-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9729 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15286751 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/286751
Semiconductor memory device Oct 5, 2016 Issued
Array ( [id] => 15731171 [patent_doc_number] => 10614014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Semiconductor storage device having a memory controller, a selection unit and a switch unit connected to each other [patent_app_type] => utility [patent_app_number] => 16/093664 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4226 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16093664 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/093664
Semiconductor storage device having a memory controller, a selection unit and a switch unit connected to each other Sep 25, 2016 Issued
Array ( [id] => 12214652 [patent_doc_number] => 09911467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Resistance variable memory apparatus and operating method thereof' [patent_app_type] => utility [patent_app_number] => 15/275732 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3375 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15275732 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/275732
Resistance variable memory apparatus and operating method thereof Sep 25, 2016 Issued
Array ( [id] => 11396860 [patent_doc_number] => 20170017396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'NONVOLATILE MEMORY INTERFACE FOR METADATA SHADOWING' [patent_app_type] => utility [patent_app_number] => 15/272933 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4937 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272933 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272933
Nonvolatile memory interface for metadata shadowing Sep 21, 2016 Issued
Array ( [id] => 12161171 [patent_doc_number] => 20180032437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'HBM WITH IN-MEMORY CACHE MANAGER' [patent_app_type] => utility [patent_app_number] => 15/272339 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4921 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272339 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/272339
HBM with in-memory cache manager Sep 20, 2016 Issued
Array ( [id] => 11539251 [patent_doc_number] => 09613663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-04 [patent_title] => 'Array structure of single-ploy nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 15/257359 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 8113 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257359 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257359
Array structure of single-ploy nonvolatile memory Sep 5, 2016 Issued
Array ( [id] => 11510001 [patent_doc_number] => 09601164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Array structure of single-ploy nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 15/257292 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 8112 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257292 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257292
Array structure of single-ploy nonvolatile memory Sep 5, 2016 Issued
Array ( [id] => 12248998 [patent_doc_number] => 09921772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Semiconductor memory device that randomizes data and randomizer thereof' [patent_app_type] => utility [patent_app_number] => 15/253757 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7748 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15253757 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/253757
Semiconductor memory device that randomizes data and randomizer thereof Aug 30, 2016 Issued
Array ( [id] => 12100909 [patent_doc_number] => 09858003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-02 [patent_title] => 'Storage system that reliably stores lower page data' [patent_app_type] => utility [patent_app_number] => 15/253740 [patent_app_country] => US [patent_app_date] => 2016-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 9992 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15253740 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/253740
Storage system that reliably stores lower page data Aug 30, 2016 Issued
Array ( [id] => 11939484 [patent_doc_number] => 20170243634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING SRAM CELLS' [patent_app_type] => utility [patent_app_number] => 15/252043 [patent_app_country] => US [patent_app_date] => 2016-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5355 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15252043 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/252043
SEMICONDUCTOR MEMORY DEVICE INCLUDING SRAM CELLS Aug 29, 2016 Abandoned
Array ( [id] => 11945843 [patent_doc_number] => 20170249994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/233691 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233691 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233691
SEMICONDUCTOR MEMORY DEVICE Aug 9, 2016 Abandoned
Array ( [id] => 11659891 [patent_doc_number] => 09672902 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-06 [patent_title] => 'Bit-cell voltage control system' [patent_app_type] => utility [patent_app_number] => 15/227669 [patent_app_country] => US [patent_app_date] => 2016-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15227669 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/227669
Bit-cell voltage control system Aug 2, 2016 Issued
Array ( [id] => 13171663 [patent_doc_number] => 10101946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Method of reading data from a memory device and information processing system controlling data reading [patent_app_type] => utility [patent_app_number] => 15/202695 [patent_app_country] => US [patent_app_date] => 2016-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 9657 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202695 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/202695
Method of reading data from a memory device and information processing system controlling data reading Jul 5, 2016 Issued
Array ( [id] => 11365900 [patent_doc_number] => 20170003881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'Apparatus, System, And Method Of Logical Address Translation For Non-Volatile Storage Memory' [patent_app_type] => utility [patent_app_number] => 15/202408 [patent_app_country] => US [patent_app_date] => 2016-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202408 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/202408
Apparatus, system, and method of logical address translation for non-volatile storage memory Jul 4, 2016 Issued
Array ( [id] => 12213940 [patent_doc_number] => 09910749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Non-volatile memory with dynamic repurpose of word line' [patent_app_type] => utility [patent_app_number] => 15/191150 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 14633 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15191150 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/191150
Non-volatile memory with dynamic repurpose of word line Jun 22, 2016 Issued
Array ( [id] => 13083101 [patent_doc_number] => 10061617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Smart memory analog DRAM [patent_app_type] => utility [patent_app_number] => 15/175181 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175181 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175181
Smart memory analog DRAM Jun 6, 2016 Issued
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