Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12989311 [patent_doc_number] => 20170345496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => ASYMMETRICAL WRITE DRIVER FOR RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 15/164665 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164665 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164665
ASYMMETRICAL WRITE DRIVER FOR RESISTIVE MEMORY May 24, 2016 Abandoned
Array ( [id] => 13070695 [patent_doc_number] => 10056131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Semiconductor memory device including first memory cell and second memory cell over first memory cell [patent_app_type] => utility [patent_app_number] => 15/164133 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 81 [patent_no_of_words] => 36605 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164133
Semiconductor memory device including first memory cell and second memory cell over first memory cell May 24, 2016 Issued
Array ( [id] => 11071376 [patent_doc_number] => 20160268340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'METHOD OF OPERATING MEMORY ARRAY HAVING DIVIDED APART BIT LINES AND PARTIALLY DIVIDED BIT LINE SELECTOR SWITCHES' [patent_app_type] => utility [patent_app_number] => 15/161767 [patent_app_country] => US [patent_app_date] => 2016-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 28043 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15161767 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/161767
Method of operating memory array having divided apart bit lines and partially divided bit line selector switches May 22, 2016 Issued
Array ( [id] => 12012495 [patent_doc_number] => 09805814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Memory system performing wear leveling using average erase count value and operating method thereof' [patent_app_type] => utility [patent_app_number] => 15/162316 [patent_app_country] => US [patent_app_date] => 2016-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 22362 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15162316 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/162316
Memory system performing wear leveling using average erase count value and operating method thereof May 22, 2016 Issued
Array ( [id] => 11876492 [patent_doc_number] => 09748274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-29 [patent_title] => 'Memory device comprising stacked memory cells and electronic device including the same' [patent_app_type] => utility [patent_app_number] => 15/160076 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 86 [patent_no_of_words] => 34439 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15160076 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/160076
Memory device comprising stacked memory cells and electronic device including the same May 19, 2016 Issued
Array ( [id] => 13242533 [patent_doc_number] => 10134473 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-20 [patent_title] => Input output scheduling for solid state media [patent_app_type] => utility [patent_app_number] => 15/159703 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 843 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159703 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159703
Input output scheduling for solid state media May 18, 2016 Issued
Array ( [id] => 12061623 [patent_doc_number] => 20170337967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'MEMORY DEVICES AND METHODS FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/156956 [patent_app_country] => US [patent_app_date] => 2016-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6852 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156956 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156956
MEMORY DEVICES AND METHODS FOR OPERATING THE SAME May 16, 2016 Abandoned
Array ( [id] => 11057090 [patent_doc_number] => 20160254052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'SET AND RESET OPERATION IN PHASE CHANGE MEMORY AND ASSOCIATED TECHNIQUES AND CONFIGURATIONS' [patent_app_type] => utility [patent_app_number] => 15/154465 [patent_app_country] => US [patent_app_date] => 2016-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7884 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15154465 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/154465
Set and reset operation in phase change memory and associated techniques and configurations May 12, 2016 Issued
Array ( [id] => 11057070 [patent_doc_number] => 20160254032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'ARRAY STRUCTURE OF SINGLE-PLOY NONVOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 15/151013 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8109 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151013 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151013
Array structure of single-ploy nonvolatile memory May 9, 2016 Issued
Array ( [id] => 11982632 [patent_doc_number] => 20170286786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'DEVIATION-INDUCED DYNAMIC MODULATION OF IMPULSE RESPONSE FOR DETECTION AND MODELING' [patent_app_type] => utility [patent_app_number] => 15/089345 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089345 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089345
DEVIATION-INDUCED DYNAMIC MODULATION OF IMPULSE RESPONSE FOR DETECTION AND MODELING Mar 31, 2016 Abandoned
Array ( [id] => 11020910 [patent_doc_number] => 20160217864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'Non-volatile Split Gate Memory Device And A Method Of Operating Same' [patent_app_type] => utility [patent_app_number] => 15/085835 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5997 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15085835 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/085835
Non-volatile Split Gate Memory Device And A Method Of Operating Same Mar 29, 2016 Abandoned
Array ( [id] => 11925389 [patent_doc_number] => 09792973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Ferroelectric memory cell sensing' [patent_app_type] => utility [patent_app_number] => 15/073989 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 12925 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073989 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/073989
Ferroelectric memory cell sensing Mar 17, 2016 Issued
Array ( [id] => 11079077 [patent_doc_number] => 20160276042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'One Time Programmable Memory' [patent_app_type] => utility [patent_app_number] => 15/072759 [patent_app_country] => US [patent_app_date] => 2016-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15072759 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/072759
One Time Programmable Memory Mar 16, 2016 Abandoned
Array ( [id] => 11897941 [patent_doc_number] => 09767880 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-19 [patent_title] => 'Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells' [patent_app_type] => utility [patent_app_number] => 15/071991 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 16528 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071991 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/071991
Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells Mar 15, 2016 Issued
Array ( [id] => 11958944 [patent_doc_number] => 20170263095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'Appliances Built-in Safety Features' [patent_app_type] => utility [patent_app_number] => 15/067452 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067452 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067452
Appliances Built-in Safety Features Mar 10, 2016 Abandoned
Array ( [id] => 11475280 [patent_doc_number] => 20170062063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMORY DEVICE THAT PERFORMS AN ADVANCE READING OPERATION' [patent_app_type] => utility [patent_app_number] => 15/062021 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9024 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062021 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/062021
Memory device that performs an advance reading operation Mar 3, 2016 Issued
Array ( [id] => 11951039 [patent_doc_number] => 20170255190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'Apparatus and Method for Simulating a Failure Response in an Electromechanical Actuator' [patent_app_type] => utility [patent_app_number] => 15/061225 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061225 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061225
Apparatus and method for simulating a failure response in an electromechanical actuator Mar 3, 2016 Issued
Array ( [id] => 10992821 [patent_doc_number] => 20160189767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'SEMICONDUCTOR DEVICES AND INTEGRATED CIRCUITS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/060984 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7398 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060984 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060984
Semiconductor devices and integrated circuits including the same Mar 3, 2016 Issued
Array ( [id] => 11725016 [patent_doc_number] => 09697876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-04 [patent_title] => 'Vertical bit vector shift in memory' [patent_app_type] => utility [patent_app_number] => 15/057736 [patent_app_country] => US [patent_app_date] => 2016-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 25111 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15057736 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/057736
Vertical bit vector shift in memory Feb 29, 2016 Issued
Array ( [id] => 10825854 [patent_doc_number] => 20160172022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/050074 [patent_app_country] => US [patent_app_date] => 2016-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 31682 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050074 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050074
Semiconductor integrated circuit device and system Feb 21, 2016 Issued
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