
Terri L. Filosi
Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )
| Most Active Art Unit | 3644 |
| Art Unit(s) | 2143, 3762, 3644, 2178 |
| Total Applications | 473 |
| Issued Applications | 279 |
| Pending Applications | 39 |
| Abandoned Applications | 165 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12038837
[patent_doc_number] => 09817065
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-14
[patent_title] => 'Test mode circuit and semiconductor device including the same'
[patent_app_type] => utility
[patent_app_number] => 14/738311
[patent_app_country] => US
[patent_app_date] => 2015-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 6338
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14738311
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/738311 | Test mode circuit and semiconductor device including the same | Jun 11, 2015 | Issued |
Array
(
[id] => 10492952
[patent_doc_number] => 20150377974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-31
[patent_title] => 'BATTERY STATE ESTIMATION METHOD AND SYSTEM USING DUAL EXTENDED KALMAN FILTER, AND RECORDING MEDIUM FOR PERFORMING THE METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/736640
[patent_app_country] => US
[patent_app_date] => 2015-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5179
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14736640
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/736640 | Battery state estimation method and system using dual extended kalman filter, and recording medium for performing the method | Jun 10, 2015 | Issued |
Array
(
[id] => 11925380
[patent_doc_number] => 09792965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-17
[patent_title] => 'Memory module and system supporting parallel and serial access modes'
[patent_app_type] => utility
[patent_app_number] => 14/737147
[patent_app_country] => US
[patent_app_date] => 2015-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 5545
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737147
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/737147 | Memory module and system supporting parallel and serial access modes | Jun 10, 2015 | Issued |
Array
(
[id] => 10394462
[patent_doc_number] => 20150279469
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-01
[patent_title] => 'NONVOLATILE MEMORY DEVICE, PROGRAM METHOD THEREOF, AND DATA PROCESSING SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/735397
[patent_app_country] => US
[patent_app_date] => 2015-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6345
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14735397
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/735397 | Program method of nonvolatile memory device for having dense threshold voltage distribution by controlling voltage of bit line according to threshold voltage of memory cell | Jun 9, 2015 | Issued |
Array
(
[id] => 14033359
[patent_doc_number] => 10228425
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-03-12
[patent_title] => Method and apparatus for learning and estimating battery state information
[patent_app_type] => utility
[patent_app_number] => 14/732098
[patent_app_country] => US
[patent_app_date] => 2015-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 8042
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14732098
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/732098 | Method and apparatus for learning and estimating battery state information | Jun 4, 2015 | Issued |
Array
(
[id] => 10384293
[patent_doc_number] => 20150269300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-24
[patent_title] => 'Memory Controller for Heterogeneous Configurable Integrated Circuit'
[patent_app_type] => utility
[patent_app_number] => 14/729829
[patent_app_country] => US
[patent_app_date] => 2015-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9452
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729829
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/729829 | Memory controller for heterogeneous configurable integrated circuit | Jun 2, 2015 | Issued |
Array
(
[id] => 11012520
[patent_doc_number] => 20160209474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-21
[patent_title] => 'METHOD TO ESTIMATE THE CHARGING TIME OF LITHIUM-ION BATTERIES AND CHARGING MONITOR'
[patent_app_type] => utility
[patent_app_number] => 14/728968
[patent_app_country] => US
[patent_app_date] => 2015-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4952
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14728968
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/728968 | METHOD TO ESTIMATE THE CHARGING TIME OF LITHIUM-ION BATTERIES AND CHARGING MONITOR | Jun 1, 2015 | Abandoned |
Array
(
[id] => 11802088
[patent_doc_number] => 09542978
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-10
[patent_title] => 'Semiconductor package with terminals adjacent sides and corners'
[patent_app_type] => utility
[patent_app_number] => 14/729042
[patent_app_country] => US
[patent_app_date] => 2015-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 7971
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729042
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/729042 | Semiconductor package with terminals adjacent sides and corners | Jun 1, 2015 | Issued |
Array
(
[id] => 11259168
[patent_doc_number] => 09484071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-01
[patent_title] => 'Voltage generation circuit, semiconductor memory apparatus having the same, and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/727053
[patent_app_country] => US
[patent_app_date] => 2015-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3878
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727053
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/727053 | Voltage generation circuit, semiconductor memory apparatus having the same, and operating method thereof | May 31, 2015 | Issued |
Array
(
[id] => 11313219
[patent_doc_number] => 20160349330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'SYSTEMS AND METHODS FOR DETERMINING VEHICLE BATTERY HEALTH'
[patent_app_type] => utility
[patent_app_number] => 14/727238
[patent_app_country] => US
[patent_app_date] => 2015-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8734
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727238
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/727238 | Systems and methods for determining vehicle battery health | May 31, 2015 | Issued |
Array
(
[id] => 11265693
[patent_doc_number] => 09489993
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-08
[patent_title] => 'Semiconductor memory apparatus optimized for setting operation parameter and operating parameter setting method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/723984
[patent_app_country] => US
[patent_app_date] => 2015-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4384
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723984
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/723984 | Semiconductor memory apparatus optimized for setting operation parameter and operating parameter setting method thereof | May 27, 2015 | Issued |
Array
(
[id] => 10740816
[patent_doc_number] => 20160086967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-24
[patent_title] => 'NONVOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/723296
[patent_app_country] => US
[patent_app_date] => 2015-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 7833
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723296
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/723296 | Nonvolatile memory device | May 26, 2015 | Issued |
Array
(
[id] => 11259190
[patent_doc_number] => 09484092
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-01
[patent_title] => 'Intrinsic vertical bit line architecture'
[patent_app_type] => utility
[patent_app_number] => 14/715562
[patent_app_country] => US
[patent_app_date] => 2015-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 62
[patent_figures_cnt] => 99
[patent_no_of_words] => 38343
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715562
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/715562 | Intrinsic vertical bit line architecture | May 17, 2015 | Issued |
Array
(
[id] => 11273503
[patent_doc_number] => 20160336050
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'COMPUTER ARCHITECTURE USING COMPUTE/STORAGE TILES'
[patent_app_type] => utility
[patent_app_number] => 14/709017
[patent_app_country] => US
[patent_app_date] => 2015-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7363
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14709017
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/709017 | Computer architecture using compute/storage tiles | May 10, 2015 | Issued |
Array
(
[id] => 11430826
[patent_doc_number] => 09569142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-14
[patent_title] => 'Semiconductor device and method of operating the same according to degree of deterioration'
[patent_app_type] => utility
[patent_app_number] => 14/696003
[patent_app_country] => US
[patent_app_date] => 2015-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4446
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14696003
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/696003 | Semiconductor device and method of operating the same according to degree of deterioration | Apr 23, 2015 | Issued |
Array
(
[id] => 11807050
[patent_doc_number] => 09548134
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-17
[patent_title] => 'Semiconductor integrated circuit device and multi chip package including the same'
[patent_app_type] => utility
[patent_app_number] => 14/693426
[patent_app_country] => US
[patent_app_date] => 2015-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4303
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14693426
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/693426 | Semiconductor integrated circuit device and multi chip package including the same | Apr 21, 2015 | Issued |
Array
(
[id] => 10651932
[patent_doc_number] => 09368194
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-14
[patent_title] => 'Semiconductor integrated circuit device and system with memory cell array'
[patent_app_type] => utility
[patent_app_number] => 14/692566
[patent_app_country] => US
[patent_app_date] => 2015-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 37
[patent_no_of_words] => 31731
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14692566
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/692566 | Semiconductor integrated circuit device and system with memory cell array | Apr 20, 2015 | Issued |
Array
(
[id] => 11846395
[patent_doc_number] => 09733949
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-15
[patent_title] => 'Semiconductor device capable of monitoring internal signal and method for driving the same'
[patent_app_type] => utility
[patent_app_number] => 14/686467
[patent_app_country] => US
[patent_app_date] => 2015-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5794
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14686467
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/686467 | Semiconductor device capable of monitoring internal signal and method for driving the same | Apr 13, 2015 | Issued |
Array
(
[id] => 10802822
[patent_doc_number] => 20160148979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/684039
[patent_app_country] => US
[patent_app_date] => 2015-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 12469
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14684039
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/684039 | Electronic device and method for fabricating the same | Apr 9, 2015 | Issued |
Array
(
[id] => 10681340
[patent_doc_number] => 20160027485
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-28
[patent_title] => 'MEMORY DEVICES, MEMORY SYSTEMS, AND RELATED OPERATING METHODS'
[patent_app_type] => utility
[patent_app_number] => 14/683186
[patent_app_country] => US
[patent_app_date] => 2015-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 18960
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14683186
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/683186 | Memory devices, memory systems, and related operating methods | Apr 9, 2015 | Issued |