Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9907807 [patent_doc_number] => 20150063009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'DYNAMIC STATIC RANDOM ACCESS MEMORY (SRAM) ARRAY CHARACTERIZATION' [patent_app_type] => utility [patent_app_number] => 14/461319 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14461319 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/461319
Dynamic static random access memory (SRAM) array characterization using an isolated bit-line Aug 14, 2014 Issued
Array ( [id] => 10294273 [patent_doc_number] => 20150179272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/458567 [patent_app_country] => US [patent_app_date] => 2014-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14458567 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/458567
Nonvolatile memory device and memory system including the same Aug 12, 2014 Issued
Array ( [id] => 13145941 [patent_doc_number] => 10090310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Memory devices having select gates with P type bodies, memory strings having separate source lines and methods [patent_app_type] => utility [patent_app_number] => 14/456479 [patent_app_country] => US [patent_app_date] => 2014-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3433 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456479 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/456479
Memory devices having select gates with P type bodies, memory strings having separate source lines and methods Aug 10, 2014 Issued
Array ( [id] => 10590351 [patent_doc_number] => 09311971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-12 [patent_title] => 'Systems and methods of semiconductor memory devices including features of output buffer initialization circuit(s) and/or multiple power-up detection/handling' [patent_app_type] => utility [patent_app_number] => 14/452383 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4632 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14452383 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/452383
Systems and methods of semiconductor memory devices including features of output buffer initialization circuit(s) and/or multiple power-up detection/handling Aug 4, 2014 Issued
Array ( [id] => 10343347 [patent_doc_number] => 20150228352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/450399 [patent_app_country] => US [patent_app_date] => 2014-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14450399 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/450399
Semiconductor memory device including dummy memory cells and memory system including the same Aug 3, 2014 Issued
Array ( [id] => 10590405 [patent_doc_number] => 09312025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Information processing apparatus, non-transitory computer-readable storage medium and refresh control method' [patent_app_type] => utility [patent_app_number] => 14/449743 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8852 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14449743 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/449743
Information processing apparatus, non-transitory computer-readable storage medium and refresh control method Jul 31, 2014 Issued
Array ( [id] => 13806401 [patent_doc_number] => 10180464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-15 [patent_title] => Estimation of the state of deterioration of an electric battery [patent_app_type] => utility [patent_app_number] => 14/908380 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 7884 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14908380 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/908380
Estimation of the state of deterioration of an electric battery Jul 15, 2014 Issued
Array ( [id] => 10053292 [patent_doc_number] => 09093173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-28 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 14/329365 [patent_app_country] => US [patent_app_date] => 2014-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7209 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14329365 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/329365
Semiconductor memory apparatus Jul 10, 2014 Issued
Array ( [id] => 9856431 [patent_doc_number] => 20150036448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-05 [patent_title] => 'OUTPUT CIRCUIT FOR IMPLEMENTING HIGH SPEED DATA TRANSMITION' [patent_app_type] => utility [patent_app_number] => 14/322129 [patent_app_country] => US [patent_app_date] => 2014-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14322129 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/322129
Output circuit for implementing high speed data transmition Jul 1, 2014 Issued
Array ( [id] => 12019498 [patent_doc_number] => 09812208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'System and method for employing secure non-volatile storage devices in gaming machines' [patent_app_type] => utility [patent_app_number] => 14/321137 [patent_app_country] => US [patent_app_date] => 2014-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3317 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14321137 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/321137
System and method for employing secure non-volatile storage devices in gaming machines Jun 30, 2014 Issued
Array ( [id] => 10343311 [patent_doc_number] => 20150228316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'DRIVER AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/308449 [patent_app_country] => US [patent_app_date] => 2014-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14308449 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/308449
Driver and semiconductor memory device including the same Jun 17, 2014 Issued
Array ( [id] => 11452967 [patent_doc_number] => 09576617 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Multiport memory element circuitry' [patent_app_type] => utility [patent_app_number] => 14/297063 [patent_app_country] => US [patent_app_date] => 2014-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7653 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14297063 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/297063
Multiport memory element circuitry Jun 4, 2014 Issued
Array ( [id] => 11035995 [patent_doc_number] => 20160232952 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2016-08-11 [patent_title] => 'Integrated Circuits with Asymmetric and Stacked Transistors' [patent_app_type] => utility [patent_app_number] => 14/268183 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8056 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268183
Integrated circuits with asymmetric and stacked transistors May 1, 2014 Issued
Array ( [id] => 11035995 [patent_doc_number] => 20160232952 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2016-08-11 [patent_title] => 'Integrated Circuits with Asymmetric and Stacked Transistors' [patent_app_type] => utility [patent_app_number] => 14/268183 [patent_app_country] => US [patent_app_date] => 2014-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8056 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14268183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/268183
Integrated circuits with asymmetric and stacked transistors May 1, 2014 Issued
Array ( [id] => 10624187 [patent_doc_number] => 09343136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Semiconductor devices and integrated circuits including the same' [patent_app_type] => utility [patent_app_number] => 14/265493 [patent_app_country] => US [patent_app_date] => 2014-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7377 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14265493 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/265493
Semiconductor devices and integrated circuits including the same Apr 29, 2014 Issued
Array ( [id] => 10328837 [patent_doc_number] => 20150213841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'MEMORY CHIP AND MEMORY STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/264769 [patent_app_country] => US [patent_app_date] => 2014-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4690 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14264769 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/264769
MEMORY CHIP AND MEMORY STORAGE DEVICE Apr 28, 2014 Abandoned
Array ( [id] => 10617401 [patent_doc_number] => 09336847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Method and apparatus for generating a reference for use with a magnetic tunnel junction' [patent_app_type] => utility [patent_app_number] => 14/257794 [patent_app_country] => US [patent_app_date] => 2014-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 7425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14257794 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/257794
Method and apparatus for generating a reference for use with a magnetic tunnel junction Apr 20, 2014 Issued
Array ( [id] => 10409729 [patent_doc_number] => 20150294738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'TEST STRUCTURE AND METHOD OF TESTING A MICROCHIP' [patent_app_type] => utility [patent_app_number] => 14/253235 [patent_app_country] => US [patent_app_date] => 2014-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2554 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14253235 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/253235
TEST STRUCTURE AND METHOD OF TESTING A MICROCHIP Apr 14, 2014 Abandoned
Array ( [id] => 10370132 [patent_doc_number] => 20150255138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'CIRCUIT AND METHOD FOR IMPRINT REDUCTION IN FRAM MEMORIES' [patent_app_type] => utility [patent_app_number] => 14/252551 [patent_app_country] => US [patent_app_date] => 2014-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5929 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14252551 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/252551
Circuit and method for imprint reduction in FRAM memories Apr 13, 2014 Issued
Array ( [id] => 10590382 [patent_doc_number] => 09312002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Methods for programming ReRAM devices' [patent_app_type] => utility [patent_app_number] => 14/245194 [patent_app_country] => US [patent_app_date] => 2014-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 10201 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14245194 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/245194
Methods for programming ReRAM devices Apr 3, 2014 Issued
Menu