Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9033031 [patent_doc_number] => 20130235669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'HIGH VOLTAGE SWITCH CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/415353 [patent_app_country] => US [patent_app_date] => 2012-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13415353 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/415353
HIGH VOLTAGE SWITCH CIRCUIT Mar 7, 2012 Abandoned
Array ( [id] => 8263642 [patent_doc_number] => 20120163068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => '10T SRAM Cell with Near Dual Port Functionality' [patent_app_type] => utility [patent_app_number] => 13/412773 [patent_app_country] => US [patent_app_date] => 2012-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7662 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13412773 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/412773
10T SRAM cell with near dual port functionality Mar 5, 2012 Issued
Array ( [id] => 8573186 [patent_doc_number] => 08339839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-25 [patent_title] => 'SRAM cell for single sided write' [patent_app_type] => utility [patent_app_number] => 13/363051 [patent_app_country] => US [patent_app_date] => 2012-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 8067 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/363051
SRAM cell for single sided write Jan 30, 2012 Issued
Array ( [id] => 8195347 [patent_doc_number] => 20120120738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/353949 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10798 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20120120738.pdf [firstpage_image] =>[orig_patent_app_number] => 13353949 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/353949
Semiconductor device Jan 18, 2012 Issued
Array ( [id] => 8189122 [patent_doc_number] => 20120117315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'SEMICONDUCTOR MEMORY CARD' [patent_app_type] => utility [patent_app_number] => 13/353850 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7549 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117315.pdf [firstpage_image] =>[orig_patent_app_number] => 13353850 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/353850
Semiconductor memory card Jan 18, 2012 Issued
Array ( [id] => 10624197 [patent_doc_number] => 09343146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Apparatuses and methods for low power current mode sense amplification' [patent_app_type] => utility [patent_app_number] => 13/347613 [patent_app_country] => US [patent_app_date] => 2012-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3247 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13347613 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/347613
Apparatuses and methods for low power current mode sense amplification Jan 9, 2012 Issued
Array ( [id] => 10091992 [patent_doc_number] => 09128817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Address transforming circuit and semiconductor memory device including the same' [patent_app_type] => utility [patent_app_number] => 13/343803 [patent_app_country] => US [patent_app_date] => 2012-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6724 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13343803 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/343803
Address transforming circuit and semiconductor memory device including the same Jan 4, 2012 Issued
Array ( [id] => 8731838 [patent_doc_number] => 20130077407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'NONVOLATILE MEMORY DEVICE, PROGRAM METHOD THEREOF, AND DATA PROCESSING SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/340961 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6335 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340961 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340961
Program method of nonvolatile memory device for having dense threshold voltage distribution by controlling voltage of bit line according to threshold voltage of memory cell Dec 29, 2011 Issued
Array ( [id] => 9959629 [patent_doc_number] => 09007843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Internal data compare for memory verification' [patent_app_type] => utility [patent_app_number] => 13/339099 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6906 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13339099 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/339099
Internal data compare for memory verification Dec 27, 2011 Issued
Array ( [id] => 8906441 [patent_doc_number] => 20130173944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'REDUCING POWER CONSUMPTION OF MEMORY' [patent_app_type] => utility [patent_app_number] => 13/338449 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4070 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338449 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/338449
REDUCING POWER CONSUMPTION OF MEMORY Dec 27, 2011 Abandoned
Array ( [id] => 8521268 [patent_doc_number] => 20120320676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'SEMICONDUCTOR SYSTEM, NONVOLATILE MEMORY APPARATUS, AND AN ASSOCIATED READ METHOD' [patent_app_type] => utility [patent_app_number] => 13/337461 [patent_app_country] => US [patent_app_date] => 2011-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3668 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13337461 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/337461
SEMICONDUCTOR SYSTEM, NONVOLATILE MEMORY APPARATUS, AND AN ASSOCIATED READ METHOD Dec 26, 2011 Abandoned
Array ( [id] => 9779703 [patent_doc_number] => 08854917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Column address counter circuit of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/332021 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13332021 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/332021
Column address counter circuit of semiconductor memory device Dec 19, 2011 Issued
Array ( [id] => 8263666 [patent_doc_number] => 20120163098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING MODE REGISTER SET AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/325141 [patent_app_country] => US [patent_app_date] => 2011-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5593 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13325141 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/325141
Semiconductor memory device including mode register set and method for operating the same Dec 13, 2011 Issued
Array ( [id] => 10022549 [patent_doc_number] => 09065044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Three dimensional non-volatile storage with connected word lines' [patent_app_type] => utility [patent_app_number] => 13/323695 [patent_app_country] => US [patent_app_date] => 2011-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 64 [patent_no_of_words] => 32106 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13323695 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/323695
Three dimensional non-volatile storage with connected word lines Dec 11, 2011 Issued
Array ( [id] => 9705678 [patent_doc_number] => 08830759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Sense amplifier with offset current injection' [patent_app_type] => utility [patent_app_number] => 13/316301 [patent_app_country] => US [patent_app_date] => 2011-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2098 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13316301 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/316301
Sense amplifier with offset current injection Dec 8, 2011 Issued
Array ( [id] => 8125289 [patent_doc_number] => 20120087192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'Non-Volatile Memory Device with Program Current Clamp and Related Method' [patent_app_type] => utility [patent_app_number] => 13/315299 [patent_app_country] => US [patent_app_date] => 2011-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5346 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20120087192.pdf [firstpage_image] =>[orig_patent_app_number] => 13315299 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/315299
Non-volatile memory device with program current clamp and related method Dec 8, 2011 Issued
Array ( [id] => 8852321 [patent_doc_number] => 20130141997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'SINGLE-ENDED VOLATILE MEMORY ACCESS' [patent_app_type] => utility [patent_app_number] => 13/312945 [patent_app_country] => US [patent_app_date] => 2011-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13312945 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/312945
SINGLE-ENDED VOLATILE MEMORY ACCESS Dec 5, 2011 Abandoned
Array ( [id] => 9678630 [patent_doc_number] => 08817550 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-26 [patent_title] => 'Systems and methods of semiconductor memory devices including features of output buffer initialization circuit(s) and/or multiple power-up detection/handling' [patent_app_type] => utility [patent_app_number] => 13/310637 [patent_app_country] => US [patent_app_date] => 2011-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4729 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13310637 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/310637
Systems and methods of semiconductor memory devices including features of output buffer initialization circuit(s) and/or multiple power-up detection/handling Dec 1, 2011 Issued
Array ( [id] => 8357829 [patent_doc_number] => 20120212989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'MEMORY CORE AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/304851 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304851
Semiconductor memory device including vertical channel transistors Nov 27, 2011 Issued
Array ( [id] => 8827640 [patent_doc_number] => 20130128685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'MEMORY MANAGEMENT SYSTEM WITH POWER SOURCE AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/303863 [patent_app_country] => US [patent_app_date] => 2011-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13303863 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/303863
Memory management system with power source and method of manufacture thereof Nov 22, 2011 Issued
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