
Terri L. Filosi
Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )
| Most Active Art Unit | 3644 |
| Art Unit(s) | 2143, 3762, 3644, 2178 |
| Total Applications | 473 |
| Issued Applications | 279 |
| Pending Applications | 39 |
| Abandoned Applications | 165 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6483847
[patent_doc_number] => 20100208515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-19
[patent_title] => 'MAGNETIC RANDOM ACCESS MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/702847
[patent_app_country] => US
[patent_app_date] => 2010-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 7135
[patent_no_of_claims] => 19
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0208/20100208515.pdf
[firstpage_image] =>[orig_patent_app_number] => 12702847
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/702847 | MAGNETIC RANDOM ACCESS MEMORY | Feb 8, 2010 | Abandoned |
Array
(
[id] => 6140571
[patent_doc_number] => 20110128807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-02
[patent_title] => 'MEMORY DEVICE AND SENSE CIRCUITRY THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 12/697275
[patent_app_country] => US
[patent_app_date] => 2010-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2822
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20110128807.pdf
[firstpage_image] =>[orig_patent_app_number] => 12697275
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/697275 | MEMORY DEVICE AND SENSE CIRCUITRY THEREFOR | Jan 30, 2010 | Abandoned |
Array
(
[id] => 8423181
[patent_doc_number] => 08279672
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-02
[patent_title] => 'Nonvolatile memory having plurality of memory blocks each including data storage area and discrimination area'
[patent_app_type] => utility
[patent_app_number] => 12/656177
[patent_app_country] => US
[patent_app_date] => 2010-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_no_of_words] => 5701
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[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12656177
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/656177 | Nonvolatile memory having plurality of memory blocks each including data storage area and discrimination area | Jan 19, 2010 | Issued |
Array
(
[id] => 6227733
[patent_doc_number] => 20100182866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE FOR COMPENSATING FOR OPERATING VOLTAGE DIFFERENCE BETWEEN NEAR CELL AND FAR CELL IN CONSIDERATION OF CELL POSITION, AND MEMORY CARD AND MEMORY SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/687949
[patent_app_country] => US
[patent_app_date] => 2010-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4212
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0182/20100182866.pdf
[firstpage_image] =>[orig_patent_app_number] => 12687949
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/687949 | Semiconductor memory device for compensating for operating voltage difference between near cell and far cell in consideration of cell position, and memory card and memory system including the same | Jan 14, 2010 | Issued |
Array
(
[id] => 6316508
[patent_doc_number] => 20100195393
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-05
[patent_title] => 'Data storage system with refresh in place'
[patent_app_type] => utility
[patent_app_number] => 12/653939
[patent_app_country] => US
[patent_app_date] => 2009-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 8164
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[pdf_file] => publications/A1/0195/20100195393.pdf
[firstpage_image] =>[orig_patent_app_number] => 12653939
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/653939 | Data storage system with refresh in place | Dec 17, 2009 | Abandoned |
Array
(
[id] => 6470329
[patent_doc_number] => 20100091569
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-15
[patent_title] => 'METHODS OF FORMING FLASH DEVICE WITH SHARED WORD LINES'
[patent_app_type] => utility
[patent_app_number] => 12/641113
[patent_app_country] => US
[patent_app_date] => 2009-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
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[patent_no_of_words] => 10450
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0091/20100091569.pdf
[firstpage_image] =>[orig_patent_app_number] => 12641113
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/641113 | Methods of forming flash device with shared word lines | Dec 16, 2009 | Issued |
Array
(
[id] => 6286296
[patent_doc_number] => 20100157704
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-24
[patent_title] => 'Semiconductor memory device that can relief defective address'
[patent_app_type] => utility
[patent_app_number] => 12/654285
[patent_app_country] => US
[patent_app_date] => 2009-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 5079
[patent_no_of_claims] => 16
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[pdf_file] => publications/A1/0157/20100157704.pdf
[firstpage_image] =>[orig_patent_app_number] => 12654285
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/654285 | Semiconductor memory device that can relief defective address | Dec 15, 2009 | Abandoned |
Array
(
[id] => 6483228
[patent_doc_number] => 20100213987
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-26
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD FOR THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/632335
[patent_app_country] => US
[patent_app_date] => 2009-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 6330
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[pdf_file] => publications/A1/0213/20100213987.pdf
[firstpage_image] =>[orig_patent_app_number] => 12632335
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/632335 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD FOR THE SAME | Dec 6, 2009 | Abandoned |
Array
(
[id] => 6180969
[patent_doc_number] => 20110122683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-26
[patent_title] => 'Resetting Phase Change Memory Bits'
[patent_app_type] => utility
[patent_app_number] => 12/624821
[patent_app_country] => US
[patent_app_date] => 2009-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => publications/A1/0122/20110122683.pdf
[firstpage_image] =>[orig_patent_app_number] => 12624821
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/624821 | Resetting Phase Change Memory Bits | Nov 23, 2009 | Abandoned |
Array
(
[id] => 6181088
[patent_doc_number] => 20110122712
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-26
[patent_title] => 'Controlling voltage levels applied to access devices when accessing storage cells in a memory'
[patent_app_type] => utility
[patent_app_number] => 12/591511
[patent_app_country] => US
[patent_app_date] => 2009-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => publications/A1/0122/20110122712.pdf
[firstpage_image] =>[orig_patent_app_number] => 12591511
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/591511 | Controlling voltage levels applied to access devices when accessing storage cells in a memory | Nov 19, 2009 | Issued |
Array
(
[id] => 6276679
[patent_doc_number] => 20100118606
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-13
[patent_title] => 'Methods of programming non-volatile memory devices and memory devices programmed thereby'
[patent_app_type] => utility
[patent_app_number] => 12/590701
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[patent_app_date] => 2009-11-12
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[pdf_file] => publications/A1/0118/20100118606.pdf
[firstpage_image] =>[orig_patent_app_number] => 12590701
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/590701 | Methods of programming non-volatile flash memory devices by applying a higher voltage level to a selected word line than to a word line neighboring the selected word line | Nov 11, 2009 | Issued |
Array
(
[id] => 9583917
[patent_doc_number] => 08773922
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[patent_kind] => B2
[patent_issue_date] => 2014-07-08
[patent_title] => 'Non-volatile memory device, memory card and system, and method determining read voltage by comparing referenced program data with comparative read data'
[patent_app_type] => utility
[patent_app_number] => 12/614545
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/614545 | Non-volatile memory device, memory card and system, and method determining read voltage by comparing referenced program data with comparative read data | Nov 8, 2009 | Issued |
Array
(
[id] => 6060637
[patent_doc_number] => 20110199821
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-18
[patent_title] => 'POWER MANAGEMENT CHIP FURNISHED WITH VOLTAGE CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/124825
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[pdf_file] => publications/A1/0199/20110199821.pdf
[firstpage_image] =>[orig_patent_app_number] => 13124825
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/124825 | POWER MANAGEMENT CHIP FURNISHED WITH VOLTAGE CONTROLLER | Oct 12, 2009 | Abandoned |
Array
(
[id] => 6470405
[patent_doc_number] => 20100091576
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-15
[patent_title] => 'Nonvolatile memory device, program method and precharge voltage boosting method thereof, and memory system including the nonvolatile memory device'
[patent_app_type] => utility
[patent_app_number] => 12/587803
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[firstpage_image] =>[orig_patent_app_number] => 12587803
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Array
(
[id] => 6131617
[patent_doc_number] => 20110088005
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[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'METHOD AND APPARATUS FOR CONFIGURING A CONTENT-ADDRESSABLE MEMORY (CAM) DESIGN AS BINARY CAM OR TERNARY CAM'
[patent_app_type] => utility
[patent_app_number] => 12/576275
[patent_app_country] => US
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[pdf_file] => publications/A1/0088/20110088005.pdf
[firstpage_image] =>[orig_patent_app_number] => 12576275
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/576275 | Method and apparatus for configuring a content-addressable memory (CAM) design as binary CAM or ternary CAM | Oct 8, 2009 | Issued |
Array
(
[id] => 8204661
[patent_doc_number] => 08189415
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-29
[patent_title] => 'Sensing amplifier applied to at least a memory cell, memory device, and enhancement method for boosting the sensing amplifier thereof'
[patent_app_type] => utility
[patent_app_number] => 12/573155
[patent_app_country] => US
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[pdf_file] => patents/08/189/08189415.pdf
[firstpage_image] =>[orig_patent_app_number] => 12573155
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/573155 | Sensing amplifier applied to at least a memory cell, memory device, and enhancement method for boosting the sensing amplifier thereof | Oct 4, 2009 | Issued |
Array
(
[id] => 8008329
[patent_doc_number] => 08085573
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-27
[patent_title] => 'Ferroelectric memory'
[patent_app_type] => utility
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[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 12562951
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/562951 | Ferroelectric memory | Sep 17, 2009 | Issued |
Array
(
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[patent_title] => 'Method of programming of phase-change memory and associated devices and materials'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/584821 | Method of programming of phase-change memory and associated devices and materials | Sep 13, 2009 | Abandoned |
Array
(
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[patent_issue_date] => 2010-04-22
[patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICE PERFORMING PROGRAM AND VERIFICATION OPERATION'
[patent_app_type] => utility
[patent_app_number] => 12/558631
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 12558631
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/558631 | Variable resistance memory device performing program and verification operation | Sep 13, 2009 | Issued |
Array
(
[id] => 6530664
[patent_doc_number] => 20100124138
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-20
[patent_title] => 'Semiconductor memory device having variable-mode refresh operation'
[patent_app_type] => utility
[patent_app_number] => 12/585317
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/585317 | Semiconductor memory device having variable-mode refresh operation | Sep 10, 2009 | Abandoned |