Search

Terri L. Filosi

Examiner (ID: 5593, Phone: (571)270-1988 , Office: P/2143 )

Most Active Art Unit
3644
Art Unit(s)
2143, 3762, 3644, 2178
Total Applications
473
Issued Applications
279
Pending Applications
39
Abandoned Applications
165

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7556459 [patent_doc_number] => 08068363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-29 [patent_title] => 'Flash memory apparatus and read operation control method therefor' [patent_app_type] => utility [patent_app_number] => 12/494491 [patent_app_country] => US [patent_app_date] => 2009-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3474 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/068/08068363.pdf [firstpage_image] =>[orig_patent_app_number] => 12494491 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/494491
Flash memory apparatus and read operation control method therefor Jun 29, 2009 Issued
Array ( [id] => 6565050 [patent_doc_number] => 20100046293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'MEMORY CELL BLOCK OF NONVOLATILE MEMORY DEVICE AND METHOD OF MANAGING SUPPLEMENTARY INFORMATION' [patent_app_type] => utility [patent_app_number] => 12/493335 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3752 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20100046293.pdf [firstpage_image] =>[orig_patent_app_number] => 12493335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493335
MEMORY CELL BLOCK OF NONVOLATILE MEMORY DEVICE AND METHOD OF MANAGING SUPPLEMENTARY INFORMATION Jun 28, 2009 Abandoned
Array ( [id] => 6444668 [patent_doc_number] => 20100188880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'POWER SWITCHING FOR PORTABLE APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 12/473387 [patent_app_country] => US [patent_app_date] => 2009-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5086 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20100188880.pdf [firstpage_image] =>[orig_patent_app_number] => 12473387 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/473387
POWER SWITCHING FOR PORTABLE APPLICATIONS May 27, 2009 Abandoned
Array ( [id] => 8331576 [patent_doc_number] => 08239653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Active-active support of virtual storage management in a storage area network (“SAN”)' [patent_app_type] => utility [patent_app_number] => 12/428703 [patent_app_country] => US [patent_app_date] => 2009-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6117 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12428703 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/428703
Active-active support of virtual storage management in a storage area network (“SAN”) Apr 22, 2009 Issued
Array ( [id] => 8645574 [patent_doc_number] => 08370571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Transfer control of a storage volume between storage controllers in a cluster' [patent_app_type] => utility [patent_app_number] => 12/420405 [patent_app_country] => US [patent_app_date] => 2009-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3711 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12420405 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/420405
Transfer control of a storage volume between storage controllers in a cluster Apr 7, 2009 Issued
Array ( [id] => 6520198 [patent_doc_number] => 20100220516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'Reducing Source Loading Effect in Spin Torque Transfer Magnetoresisitive Random Access Memory (STT-MRAM)' [patent_app_type] => utility [patent_app_number] => 12/396295 [patent_app_country] => US [patent_app_date] => 2009-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9461 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20100220516.pdf [firstpage_image] =>[orig_patent_app_number] => 12396295 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/396295
Reducing source loading effect in spin torque transfer magnetoresisitive random access memory (STT-MRAM) Mar 1, 2009 Issued
Array ( [id] => 9609884 [patent_doc_number] => 08787064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Programmable bipolar electronic device' [patent_app_type] => utility [patent_app_number] => 13/130805 [patent_app_country] => US [patent_app_date] => 2009-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7019 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13130805 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/130805
Programmable bipolar electronic device Jan 12, 2009 Issued
Array ( [id] => 6348624 [patent_doc_number] => 20100085820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/532841 [patent_app_country] => US [patent_app_date] => 2008-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8247 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20100085820.pdf [firstpage_image] =>[orig_patent_app_number] => 12532841 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/532841
Three dimensionally stacked memory and the isolation of memory cell layer Dec 21, 2008 Issued
Array ( [id] => 5433907 [patent_doc_number] => 20090168493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE WITH STACKED MEMORY CELL AND METHOD OF MANUFACTURING THE STACKED MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 12/273225 [patent_app_country] => US [patent_app_date] => 2008-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12298 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20090168493.pdf [firstpage_image] =>[orig_patent_app_number] => 12273225 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/273225
Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell Nov 17, 2008 Issued
Array ( [id] => 5283633 [patent_doc_number] => 20090097307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'Phase-change random access memory device, system having the same, and associated methods' [patent_app_type] => utility [patent_app_number] => 12/285657 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20090097307.pdf [firstpage_image] =>[orig_patent_app_number] => 12285657 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/285657
Phase-change random access memory device, system having the same, and associated methods Oct 9, 2008 Abandoned
Array ( [id] => 7520038 [patent_doc_number] => 07974143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-05 [patent_title] => 'Memory system, a memory device, a memory controller and method thereof' [patent_app_type] => utility [patent_app_number] => 12/285294 [patent_app_country] => US [patent_app_date] => 2008-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 10139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/974/07974143.pdf [firstpage_image] =>[orig_patent_app_number] => 12285294 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/285294
Memory system, a memory device, a memory controller and method thereof Sep 30, 2008 Issued
Array ( [id] => 8353510 [patent_doc_number] => 08248848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-08-21 [patent_title] => 'System and methods for multi-level nonvolatile memory read, program and erase' [patent_app_type] => utility [patent_app_number] => 12/240123 [patent_app_country] => US [patent_app_date] => 2008-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 35 [patent_no_of_words] => 25381 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12240123 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/240123
System and methods for multi-level nonvolatile memory read, program and erase Sep 28, 2008 Issued
Array ( [id] => 7704030 [patent_doc_number] => 08089793 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-03 [patent_title] => 'Dynamic random access memory based content addressable storage element with concurrent read and compare' [patent_app_type] => utility [patent_app_number] => 12/195299 [patent_app_country] => US [patent_app_date] => 2008-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5468 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/089/08089793.pdf [firstpage_image] =>[orig_patent_app_number] => 12195299 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/195299
Dynamic random access memory based content addressable storage element with concurrent read and compare Aug 19, 2008 Issued
Array ( [id] => 9047992 [patent_doc_number] => 08542548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Semiconductor memory device and thermal code output circuit capable of correctly measuring thermal codes' [patent_app_type] => utility [patent_app_number] => 12/228819 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3246 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12228819 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/228819
Semiconductor memory device and thermal code output circuit capable of correctly measuring thermal codes Aug 14, 2008 Issued
Array ( [id] => 6249674 [patent_doc_number] => 20100027331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'MEMORY AND READING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/183285 [patent_app_country] => US [patent_app_date] => 2008-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2716 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20100027331.pdf [firstpage_image] =>[orig_patent_app_number] => 12183285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/183285
Memory and reading method thereof Jul 30, 2008 Issued
Array ( [id] => 4673912 [patent_doc_number] => 20080211540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'PROGRAMMABLE ANTI-FUSE BASED ON, E.G., ZNCDS MEMORY DEVICES FOR FPGA AND OTHER APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 12/038807 [patent_app_country] => US [patent_app_date] => 2008-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7210 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20080211540.pdf [firstpage_image] =>[orig_patent_app_number] => 12038807 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/038807
PROGRAMMABLE ANTI-FUSE BASED ON, E.G., ZNCDS MEMORY DEVICES FOR FPGA AND OTHER APPLICATIONS Feb 26, 2008 Abandoned
Array ( [id] => 8019767 [patent_doc_number] => 08139392 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Nonvolatile semiconductor memory device and writing method of the same' [patent_app_type] => utility [patent_app_number] => 12/525615 [patent_app_country] => US [patent_app_date] => 2008-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 18018 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 719 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/139/08139392.pdf [firstpage_image] =>[orig_patent_app_number] => 12525615 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/525615
Nonvolatile semiconductor memory device and writing method of the same Jan 31, 2008 Issued
Array ( [id] => 9991199 [patent_doc_number] => 09036414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-19 [patent_title] => 'Temporary locking of an electronic circuit to protect data contained in the electronic circuit' [patent_app_type] => utility [patent_app_number] => 12/521773 [patent_app_country] => US [patent_app_date] => 2008-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 8409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12521773 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/521773
Temporary locking of an electronic circuit to protect data contained in the electronic circuit Jan 3, 2008 Issued
Array ( [id] => 8307210 [patent_doc_number] => 08228754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Routing access with minimized bus area in multi-port memory device' [patent_app_type] => utility [patent_app_number] => 11/977101 [patent_app_country] => US [patent_app_date] => 2007-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 9049 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11977101 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/977101
Routing access with minimized bus area in multi-port memory device Oct 22, 2007 Issued
Array ( [id] => 10029330 [patent_doc_number] => 09071246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Memory controller for heterogeneous configurable integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/855740 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9358 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11855740 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/855740
Memory controller for heterogeneous configurable integrated circuits Sep 13, 2007 Issued
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