
Terry A. Wallace
Examiner (ID: 910, Phone: (571)272-2630 , Office: P/2916 )
| Most Active Art Unit | 2916 |
| Art Unit(s) | 2916, 2912, 2900, 2902 |
| Total Applications | 11456 |
| Issued Applications | 11361 |
| Pending Applications | 3 |
| Abandoned Applications | 90 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18759878
[patent_doc_number] => 11810918
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-07
[patent_title] => Stacked vertical transport field-effect transistor logic gate structures with shared epitaxial layers
[patent_app_type] => utility
[patent_app_number] => 17/113674
[patent_app_country] => US
[patent_app_date] => 2020-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 90
[patent_figures_cnt] => 91
[patent_no_of_words] => 27111
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113674
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/113674 | Stacked vertical transport field-effect transistor logic gate structures with shared epitaxial layers | Dec 6, 2020 | Issued |
Array
(
[id] => 18120571
[patent_doc_number] => 11551970
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-10
[patent_title] => Method for manufacturing an electronic device
[patent_app_type] => utility
[patent_app_number] => 17/109101
[patent_app_country] => US
[patent_app_date] => 2020-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 17
[patent_no_of_words] => 6602
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109101
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/109101 | Method for manufacturing an electronic device | Nov 30, 2020 | Issued |
Array
(
[id] => 19370611
[patent_doc_number] => 12062705
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Semiconductor device and method of forming vertical structure
[patent_app_type] => utility
[patent_app_number] => 17/106933
[patent_app_country] => US
[patent_app_date] => 2020-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 4975
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106933
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/106933 | Semiconductor device and method of forming vertical structure | Nov 29, 2020 | Issued |
Array
(
[id] => 20216464
[patent_doc_number] => 12413121
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/778060
[patent_app_country] => US
[patent_app_date] => 2020-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 0
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17778060
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/778060 | Semiconductor device | Nov 11, 2020 | Issued |
Array
(
[id] => 17403073
[patent_doc_number] => 20220045164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => INTEGRATED CIRCUIT DEVICES INCLUDING A VERTICAL FIELD-EFFECT TRANSISTOR AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/094920
[patent_app_country] => US
[patent_app_date] => 2020-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4745
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094920
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/094920 | Integrated circuit devices including a vertical field-effect transistor and methods of forming the same | Nov 10, 2020 | Issued |
Array
(
[id] => 17623559
[patent_doc_number] => 11342625
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => Method of fabricating and method of using porous wafer battery
[patent_app_type] => utility
[patent_app_number] => 17/087607
[patent_app_country] => US
[patent_app_date] => 2020-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 3638
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087607
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/087607 | Method of fabricating and method of using porous wafer battery | Nov 1, 2020 | Issued |
Array
(
[id] => 19370488
[patent_doc_number] => 12062582
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-13
[patent_title] => Method of manufacturing semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/084628
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 7037
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084628
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/084628 | Method of manufacturing semiconductor devices | Oct 29, 2020 | Issued |
Array
(
[id] => 16631586
[patent_doc_number] => 20210050239
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => LASER MARKING DEVICE AND LASER MARKING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/085310
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4270
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085310
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/085310 | Laser marking device and laser marking method | Oct 29, 2020 | Issued |
Array
(
[id] => 18645749
[patent_doc_number] => 11769830
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-26
[patent_title] => Semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/038020
[patent_app_country] => US
[patent_app_date] => 2020-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 50
[patent_figures_cnt] => 50
[patent_no_of_words] => 10588
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17038020
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/038020 | Semiconductor devices | Sep 29, 2020 | Issued |
Array
(
[id] => 19093905
[patent_doc_number] => 11955370
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Semiconductor devices and methods of manufacture
[patent_app_type] => utility
[patent_app_number] => 17/025528
[patent_app_country] => US
[patent_app_date] => 2020-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 40
[patent_no_of_words] => 15780
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025528
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/025528 | Semiconductor devices and methods of manufacture | Sep 17, 2020 | Issued |
Array
(
[id] => 19116380
[patent_doc_number] => 20240128130
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => METHOD FOR EVALUATING SEMICONDUCTOR WAFER, METHOD FOR SELECTING SEMICONDUCTOR WAFER AND METHOD FOR FABRICATING DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/769572
[patent_app_country] => US
[patent_app_date] => 2020-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4484
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17769572
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/769572 | Method for evaluating semiconductor wafer, method for selecting semiconductor wafer and method for fabricating device | Sep 13, 2020 | Issued |
Array
(
[id] => 18874630
[patent_doc_number] => 11862452
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Contact isolation in semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/006642
[patent_app_country] => US
[patent_app_date] => 2020-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4123
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006642
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/006642 | Contact isolation in semiconductor devices | Aug 27, 2020 | Issued |
Array
(
[id] => 17893236
[patent_doc_number] => 11456218
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-27
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/004173
[patent_app_country] => US
[patent_app_date] => 2020-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 47
[patent_no_of_words] => 16659
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004173
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/004173 | Semiconductor device and method for manufacturing the same | Aug 26, 2020 | Issued |
Array
(
[id] => 16812047
[patent_doc_number] => 20210134602
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-06
[patent_title] => IC WITH DEEP TRENCH POLYSILICON OXIDATION
[patent_app_type] => utility
[patent_app_number] => 17/004932
[patent_app_country] => US
[patent_app_date] => 2020-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7232
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004932
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/004932 | IC with deep trench polysilicon oxidation | Aug 26, 2020 | Issued |
Array
(
[id] => 16981723
[patent_doc_number] => 20210225960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-22
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/000402
[patent_app_country] => US
[patent_app_date] => 2020-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14851
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000402
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/000402 | Display device | Aug 23, 2020 | Issued |
Array
(
[id] => 17917489
[patent_doc_number] => 20220319885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => ARRANGEMENT APPARATUS AND ARRANGEMENT METHOD
[patent_app_type] => utility
[patent_app_number] => 17/599535
[patent_app_country] => US
[patent_app_date] => 2020-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4214
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17599535
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/599535 | Arrangement apparatus and arrangement method | Aug 19, 2020 | Issued |
Array
(
[id] => 17574452
[patent_doc_number] => 11322727
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-03
[patent_title] => Optical device
[patent_app_type] => utility
[patent_app_number] => 16/998875
[patent_app_country] => US
[patent_app_date] => 2020-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 17164
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998875
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/998875 | Optical device | Aug 19, 2020 | Issued |
Array
(
[id] => 18804272
[patent_doc_number] => 11837435
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-05
[patent_title] => Atom probe tomography specimen preparation
[patent_app_type] => utility
[patent_app_number] => 16/997801
[patent_app_country] => US
[patent_app_date] => 2020-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3755
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997801
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/997801 | Atom probe tomography specimen preparation | Aug 18, 2020 | Issued |
Array
(
[id] => 18131320
[patent_doc_number] => 11557537
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-17
[patent_title] => Reduced pitch memory subsystem for memory device
[patent_app_type] => utility
[patent_app_number] => 16/986776
[patent_app_country] => US
[patent_app_date] => 2020-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 27
[patent_no_of_words] => 14112
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986776
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/986776 | Reduced pitch memory subsystem for memory device | Aug 5, 2020 | Issued |
Array
(
[id] => 17284262
[patent_doc_number] => 11201308
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-14
[patent_title] => Light-emitting device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/940460
[patent_app_country] => US
[patent_app_date] => 2020-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 86
[patent_no_of_words] => 20002
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940460
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/940460 | Light-emitting device and method for manufacturing the same | Jul 27, 2020 | Issued |