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Terry D. Cunningham

Examiner (ID: 1940)

Most Active Art Unit
2816
Art Unit(s)
2816, 2504
Total Applications
1191
Issued Applications
935
Pending Applications
36
Abandoned Applications
220

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3956891 [patent_doc_number] => 05955915 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Circuit for limiting the current in a power transistor' [patent_app_type] => 1 [patent_app_number] => 8/600535 [patent_app_country] => US [patent_app_date] => 1996-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2455 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/955/05955915.pdf [firstpage_image] =>[orig_patent_app_number] => 600535 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/600535
Circuit for limiting the current in a power transistor Feb 12, 1996 Issued
Array ( [id] => 3801377 [patent_doc_number] => 05781038 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'High speed phase locked loop test method and means' [patent_app_type] => 1 [patent_app_number] => 8/597896 [patent_app_country] => US [patent_app_date] => 1996-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2082 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781038.pdf [firstpage_image] =>[orig_patent_app_number] => 597896 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/597896
High speed phase locked loop test method and means Feb 4, 1996 Issued
08/596423 SUBSTRATE BIAS GENERATOR IN SEMICONDUCTOR MEMORY DEVICE Feb 1, 1996 Abandoned
08/593555 INTERNAL REDUCED-VOLTAGE GENERATOR FOR SEMICONDUCTOR INTEGRATED CIRCUIT Jan 29, 1996 Abandoned
Array ( [id] => 3512620 [patent_doc_number] => 05570050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Zero standby current power-up reset circuit' [patent_app_type] => 1 [patent_app_number] => 8/590726 [patent_app_country] => US [patent_app_date] => 1996-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4275 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570050.pdf [firstpage_image] =>[orig_patent_app_number] => 590726 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590726
Zero standby current power-up reset circuit Jan 23, 1996 Issued
08/591942 CONSTANT-VOLTAGE GENERATING DEVICE Jan 22, 1996 Abandoned
Array ( [id] => 3876635 [patent_doc_number] => 05838192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Junction field effect voltage reference' [patent_app_type] => 1 [patent_app_number] => 8/587548 [patent_app_country] => US [patent_app_date] => 1996-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4970 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838192.pdf [firstpage_image] =>[orig_patent_app_number] => 587548 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/587548
Junction field effect voltage reference Jan 16, 1996 Issued
Array ( [id] => 3608302 [patent_doc_number] => 05578961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'MMIC bias apparatus and method' [patent_app_type] => 1 [patent_app_number] => 8/585866 [patent_app_country] => US [patent_app_date] => 1996-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3205 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/578/05578961.pdf [firstpage_image] =>[orig_patent_app_number] => 585866 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/585866
MMIC bias apparatus and method Jan 15, 1996 Issued
Array ( [id] => 3625874 [patent_doc_number] => 05642072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'High voltage generator circuit' [patent_app_type] => 1 [patent_app_number] => 8/584732 [patent_app_country] => US [patent_app_date] => 1996-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 6158 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642072.pdf [firstpage_image] =>[orig_patent_app_number] => 584732 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/584732
High voltage generator circuit Jan 10, 1996 Issued
Array ( [id] => 4413040 [patent_doc_number] => 06232832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Circuit for limiting an output voltage to a percent of a variable supply voltage' [patent_app_type] => 1 [patent_app_number] => 8/582237 [patent_app_country] => US [patent_app_date] => 1996-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7963 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232832.pdf [firstpage_image] =>[orig_patent_app_number] => 582237 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582237
Circuit for limiting an output voltage to a percent of a variable supply voltage Jan 2, 1996 Issued
Array ( [id] => 3944818 [patent_doc_number] => 05872479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Apparatus for regulating substrate voltage in semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/582263 [patent_app_country] => US [patent_app_date] => 1996-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3059 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872479.pdf [firstpage_image] =>[orig_patent_app_number] => 582263 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582263
Apparatus for regulating substrate voltage in semiconductor device Jan 2, 1996 Issued
Array ( [id] => 3737685 [patent_doc_number] => 05694074 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Semiconductor integrated circuit being able to generate sufficient boost potential disregarding generation of noise' [patent_app_type] => 1 [patent_app_number] => 8/580774 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6240 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694074.pdf [firstpage_image] =>[orig_patent_app_number] => 580774 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/580774
Semiconductor integrated circuit being able to generate sufficient boost potential disregarding generation of noise Dec 28, 1995 Issued
Array ( [id] => 4379104 [patent_doc_number] => 06288602 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'CMOS on-chip precision voltage reference scheme' [patent_app_type] => 1 [patent_app_number] => 8/580778 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2692 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288602.pdf [firstpage_image] =>[orig_patent_app_number] => 580778 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/580778
CMOS on-chip precision voltage reference scheme Dec 28, 1995 Issued
Array ( [id] => 688142 [patent_doc_number] => 07078956 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-18 [patent_title] => 'Charge pump circuit' [patent_app_type] => utility [patent_app_number] => 08/576902 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 1796 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078956.pdf [firstpage_image] =>[orig_patent_app_number] => 08576902 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576902
Charge pump circuit Dec 21, 1995 Issued
Array ( [id] => 3729659 [patent_doc_number] => 05672996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Substrate voltage supply control circuit for memory' [patent_app_type] => 1 [patent_app_number] => 8/576381 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 8806 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/672/05672996.pdf [firstpage_image] =>[orig_patent_app_number] => 576381 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576381
Substrate voltage supply control circuit for memory Dec 20, 1995 Issued
Array ( [id] => 3934378 [patent_doc_number] => 05952874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Threshold extracting method and circuit using the same' [patent_app_type] => 1 [patent_app_number] => 8/574491 [patent_app_country] => US [patent_app_date] => 1995-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2788 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952874.pdf [firstpage_image] =>[orig_patent_app_number] => 574491 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/574491
Threshold extracting method and circuit using the same Dec 18, 1995 Issued
Array ( [id] => 3876595 [patent_doc_number] => 05838189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Substrate voltage generating circuit of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/574020 [patent_app_country] => US [patent_app_date] => 1995-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5510 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 598 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838189.pdf [firstpage_image] =>[orig_patent_app_number] => 574020 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/574020
Substrate voltage generating circuit of semiconductor memory device Dec 17, 1995 Issued
08/572023 SEMICONDUCTOR CIRCUIT AND SEMICONDUCTOR CIRCUIT DEVICE Dec 13, 1995 Abandoned
Array ( [id] => 4267290 [patent_doc_number] => 06204702 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Arrangement for supplying circuits with direct currents' [patent_app_type] => 1 [patent_app_number] => 8/568554 [patent_app_country] => US [patent_app_date] => 1995-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2671 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204702.pdf [firstpage_image] =>[orig_patent_app_number] => 568554 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/568554
Arrangement for supplying circuits with direct currents Dec 6, 1995 Issued
08/567813 FAST TRANSMISSION GATE SWITCH Dec 5, 1995 Abandoned
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