| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3750245
[patent_doc_number] => 05801568
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Precise delay line circuit with predetermined reset time limit'
[patent_app_type] => 1
[patent_app_number] => 8/567979
[patent_app_country] => US
[patent_app_date] => 1995-12-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/801/05801568.pdf
[firstpage_image] =>[orig_patent_app_number] => 567979
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567979 | Precise delay line circuit with predetermined reset time limit | Dec 5, 1995 | Issued |
Array
(
[id] => 3893187
[patent_doc_number] => 05714894
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-03
[patent_title] => 'Current comparator arrangement'
[patent_app_type] => 1
[patent_app_number] => 8/567255
[patent_app_country] => US
[patent_app_date] => 1995-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/714/05714894.pdf
[firstpage_image] =>[orig_patent_app_number] => 567255
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567255 | Current comparator arrangement | Dec 4, 1995 | Issued |
Array
(
[id] => 3837793
[patent_doc_number] => 05739711
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-14
[patent_title] => 'Regulation circuit for bipolar voltage switching circuits having logic circuitry using a single error amplifier for regulation of both positive and negative voltages'
[patent_app_type] => 1
[patent_app_number] => 8/566325
[patent_app_country] => US
[patent_app_date] => 1995-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
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[pdf_file] => patents/05/739/05739711.pdf
[firstpage_image] =>[orig_patent_app_number] => 566325
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/566325 | Regulation circuit for bipolar voltage switching circuits having logic circuitry using a single error amplifier for regulation of both positive and negative voltages | Nov 30, 1995 | Issued |
Array
(
[id] => 3778006
[patent_doc_number] => 05774013
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-30
[patent_title] => 'Dual source for constant and PTAT current'
[patent_app_type] => 1
[patent_app_number] => 8/565424
[patent_app_country] => US
[patent_app_date] => 1995-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 4671
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
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[pdf_file] => patents/05/774/05774013.pdf
[firstpage_image] =>[orig_patent_app_number] => 565424
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/565424 | Dual source for constant and PTAT current | Nov 29, 1995 | Issued |
| 08/563139 | FAST TRANSMISSION GATE SWITCH | Nov 26, 1995 | Abandoned |
Array
(
[id] => 3854075
[patent_doc_number] => 05719519
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-17
[patent_title] => 'Circuit and method for reconstructing a phase current'
[patent_app_type] => 1
[patent_app_number] => 8/560155
[patent_app_country] => US
[patent_app_date] => 1995-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4525
[patent_no_of_claims] => 20
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[pdf_file] => patents/05/719/05719519.pdf
[firstpage_image] =>[orig_patent_app_number] => 560155
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/560155 | Circuit and method for reconstructing a phase current | Nov 19, 1995 | Issued |
| 08/550186 | FULLY INTEGRATED REFERENCE CIRCUIT HAVING CONTROLLED TEMPERATURE DEPENDENCE | Oct 29, 1995 | Abandoned |
| 08/547587 | REFERENCE VOLTAGE GENERATING CIRCUIT | Oct 23, 1995 | Abandoned |
| 08/545524 | CIRCUIT FOR POWERING UP A MICROPROCESSOR | Oct 18, 1995 | Abandoned |
| 08/540520 | PROTECTED SWITCH HAVING A POWER SEMICONDUCTOR DEVICE | Oct 9, 1995 | Abandoned |
| 08/537331 | PULSE GENERATOR GENERATING OUTPUT PULSE OF A PREDETERMINED WIDTH | Oct 1, 1995 | Abandoned |
| 08/536474 | CHARGE PUMP CIRCUIT HAVING DIFFERENT THRESHOLD BIASES OF THE TRANSISTORS | Sep 28, 1995 | Abandoned |
Array
(
[id] => 3688124
[patent_doc_number] => 05633610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-27
[patent_title] => 'Monolithic microwave integrated circuit apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/536245
[patent_app_country] => US
[patent_app_date] => 1995-09-29
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[pdf_file] => patents/05/633/05633610.pdf
[firstpage_image] =>[orig_patent_app_number] => 536245
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/536245 | Monolithic microwave integrated circuit apparatus | Sep 28, 1995 | Issued |
| 08/534088 | NEGATIVE VOLTAGE GENERATOR FOR USE WITH N-WELL CMOS PROCESSES | Sep 25, 1995 | Abandoned |
Array
(
[id] => 3707794
[patent_doc_number] => 05646570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Apparatus for biasing a field effect transistor with a single voltage supply'
[patent_app_type] => 1
[patent_app_number] => 8/529888
[patent_app_country] => US
[patent_app_date] => 1995-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/646/05646570.pdf
[firstpage_image] =>[orig_patent_app_number] => 529888
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/529888 | Apparatus for biasing a field effect transistor with a single voltage supply | Sep 17, 1995 | Issued |
Array
(
[id] => 3628210
[patent_doc_number] => 05594377
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Delay circuit for a write data precompensator system'
[patent_app_type] => 1
[patent_app_number] => 8/528169
[patent_app_country] => US
[patent_app_date] => 1995-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/594/05594377.pdf
[firstpage_image] =>[orig_patent_app_number] => 528169
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/528169 | Delay circuit for a write data precompensator system | Sep 13, 1995 | Issued |
Array
(
[id] => 3982626
[patent_doc_number] => 05917356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Three state phase detector'
[patent_app_type] => 1
[patent_app_number] => 8/526395
[patent_app_country] => US
[patent_app_date] => 1995-09-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/917/05917356.pdf
[firstpage_image] =>[orig_patent_app_number] => 526395
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/526395 | Three state phase detector | Sep 10, 1995 | Issued |
Array
(
[id] => 3628835
[patent_doc_number] => 05612644
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-18
[patent_title] => 'Circuits, systems and methods for controlling substrate bias in integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/521891
[patent_app_country] => US
[patent_app_date] => 1995-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/612/05612644.pdf
[firstpage_image] =>[orig_patent_app_number] => 521891
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/521891 | Circuits, systems and methods for controlling substrate bias in integrated circuits | Aug 30, 1995 | Issued |
Array
(
[id] => 3775838
[patent_doc_number] => 05734292
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Intermediate potential generation circuit'
[patent_app_type] => 1
[patent_app_number] => 8/520773
[patent_app_country] => US
[patent_app_date] => 1995-08-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/734/05734292.pdf
[firstpage_image] =>[orig_patent_app_number] => 520773
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/520773 | Intermediate potential generation circuit | Aug 29, 1995 | Issued |
Array
(
[id] => 3737651
[patent_doc_number] => 05694072
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Programmable substrate bias generator with current-mirrored differential comparator and isolated bulk-node sensing transistor for bias voltage control'
[patent_app_type] => 1
[patent_app_number] => 8/520028
[patent_app_country] => US
[patent_app_date] => 1995-08-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/694/05694072.pdf
[firstpage_image] =>[orig_patent_app_number] => 520028
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/520028 | Programmable substrate bias generator with current-mirrored differential comparator and isolated bulk-node sensing transistor for bias voltage control | Aug 27, 1995 | Issued |