| Application number | Title of the application | Filing Date | Status |
|---|
| 08/435421 | A DRIVING CIRCUIT FOR A LIQUID CRYSTAL DISPLAY | May 9, 1995 | Abandoned |
Array
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[patent_doc_number] => 05796279
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[patent_kind] => NA
[patent_issue_date] => 1998-08-18
[patent_title] => 'DC application circuit with suppressed DC magnetization'
[patent_app_type] => 1
[patent_app_number] => 8/433453
[patent_app_country] => US
[patent_app_date] => 1995-05-09
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[firstpage_image] =>[orig_patent_app_number] => 433453
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/433453 | DC application circuit with suppressed DC magnetization | May 8, 1995 | Issued |
| 08/431897 | POWER-ON INITIALIZING CIRCUIT | Apr 30, 1995 | Abandoned |
Array
(
[id] => 3560686
[patent_doc_number] => 05543745
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-06
[patent_title] => 'Voltage controlled current source and bias generation circuit using such current source'
[patent_app_type] => 1
[patent_app_number] => 8/430675
[patent_app_country] => US
[patent_app_date] => 1995-04-28
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[firstpage_image] =>[orig_patent_app_number] => 430675
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/430675 | Voltage controlled current source and bias generation circuit using such current source | Apr 27, 1995 | Issued |
Array
(
[id] => 3628250
[patent_doc_number] => 05594380
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Bootstrap circuit and data output buffer having the bootstrap circuit'
[patent_app_type] => 1
[patent_app_number] => 8/430873
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[patent_app_date] => 1995-04-28
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[firstpage_image] =>[orig_patent_app_number] => 430873
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/430873 | Bootstrap circuit and data output buffer having the bootstrap circuit | Apr 27, 1995 | Issued |
| 08/426741 | REFERENCE FOR CMOS MEMORY CELL HAVING PMOS AND NMOS TRANSISTORS WITH A COMMON FLOATING GATE | Apr 20, 1995 | Abandoned |
Array
(
[id] => 3553576
[patent_doc_number] => 05546045
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-13
[patent_title] => 'Rail to rail operational amplifier output stage'
[patent_app_type] => 1
[patent_app_number] => 8/424220
[patent_app_country] => US
[patent_app_date] => 1995-04-19
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[firstpage_image] =>[orig_patent_app_number] => 424220
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/424220 | Rail to rail operational amplifier output stage | Apr 18, 1995 | Issued |
Array
(
[id] => 664513
[patent_doc_number] => 07102422
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-09-05
[patent_title] => 'Semiconductor booster circuit having cascaded MOS transistors'
[patent_app_type] => utility
[patent_app_number] => 08/423089
[patent_app_country] => US
[patent_app_date] => 1995-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[pdf_file] => patents/07/102/07102422.pdf
[firstpage_image] =>[orig_patent_app_number] => 08423089
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/423089 | Semiconductor booster circuit having cascaded MOS transistors | Apr 17, 1995 | Issued |
| 08/421761 | BINARY PROGRAMMABLE CURRENT MIRROR | Apr 13, 1995 | Abandoned |
| 08/422615 | PULSE GENERATOR GENERATING OUTPUT PULSE OF A PREDETERMINED WIDTH | Apr 12, 1995 | Abandoned |
Array
(
[id] => 3562989
[patent_doc_number] => 05502414
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-26
[patent_title] => 'Circuit for delaying data latching from a precharged bus and method'
[patent_app_type] => 1
[patent_app_number] => 8/422617
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[patent_app_date] => 1995-04-13
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[firstpage_image] =>[orig_patent_app_number] => 422617
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/422617 | Circuit for delaying data latching from a precharged bus and method | Apr 12, 1995 | Issued |
Array
(
[id] => 3729601
[patent_doc_number] => 05672992
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-30
[patent_title] => 'Charge pump circuit for high side switch'
[patent_app_type] => 1
[patent_app_number] => 8/420301
[patent_app_country] => US
[patent_app_date] => 1995-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/672/05672992.pdf
[firstpage_image] =>[orig_patent_app_number] => 420301
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/420301 | Charge pump circuit for high side switch | Apr 10, 1995 | Issued |
Array
(
[id] => 3818054
[patent_doc_number] => 05812007
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'System for transmitting binary signals over a signal line'
[patent_app_type] => 1
[patent_app_number] => 8/411610
[patent_app_country] => US
[patent_app_date] => 1995-04-07
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[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/812/05812007.pdf
[firstpage_image] =>[orig_patent_app_number] => 411610
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/411610 | System for transmitting binary signals over a signal line | Apr 6, 1995 | Issued |
Array
(
[id] => 3957133
[patent_doc_number] => 05977818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Multi-input transistor circuit and multi-input transconductance circuit'
[patent_app_type] => 1
[patent_app_number] => 8/418447
[patent_app_country] => US
[patent_app_date] => 1995-04-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/977/05977818.pdf
[firstpage_image] =>[orig_patent_app_number] => 418447
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/418447 | Multi-input transistor circuit and multi-input transconductance circuit | Apr 6, 1995 | Issued |
| 08/417712 | PAGE AND NIBBLE MODE DRAM | Apr 5, 1995 | Abandoned |
Array
(
[id] => 3618166
[patent_doc_number] => 05534818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Preamplifier noise filtering circuit'
[patent_app_type] => 1
[patent_app_number] => 8/417436
[patent_app_country] => US
[patent_app_date] => 1995-04-05
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[firstpage_image] =>[orig_patent_app_number] => 417436
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/417436 | Preamplifier noise filtering circuit | Apr 4, 1995 | Issued |
Array
(
[id] => 3625893
[patent_doc_number] => 05642073
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-24
[patent_title] => 'System powered with inter-coupled charge pumps'
[patent_app_type] => 1
[patent_app_number] => 8/418143
[patent_app_country] => US
[patent_app_date] => 1995-04-05
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[patent_drawing_sheets_cnt] => 11
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[firstpage_image] =>[orig_patent_app_number] => 418143
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/418143 | System powered with inter-coupled charge pumps | Apr 4, 1995 | Issued |
Array
(
[id] => 3523151
[patent_doc_number] => 05506541
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-09
[patent_title] => 'Bias voltage distribution system'
[patent_app_type] => 1
[patent_app_number] => 8/416531
[patent_app_country] => US
[patent_app_date] => 1995-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/05/506/05506541.pdf
[firstpage_image] =>[orig_patent_app_number] => 416531
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/416531 | Bias voltage distribution system | Apr 2, 1995 | Issued |
| 08/414009 | SEMICONDUCTOR INTEGRATED CIRCUIT WHICH PREVENTS MALFUNCTIONS CAUSED BY NOISE | Mar 29, 1995 | Abandoned |
Array
(
[id] => 3512777
[patent_doc_number] => 05570060
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[patent_kind] => NA
[patent_issue_date] => 1996-10-29
[patent_title] => 'Circuit for limiting the current in a power transistor'
[patent_app_type] => 1
[patent_app_number] => 8/411498
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[patent_app_date] => 1995-03-28
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[pdf_file] => patents/05/570/05570060.pdf
[firstpage_image] =>[orig_patent_app_number] => 411498
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/411498 | Circuit for limiting the current in a power transistor | Mar 27, 1995 | Issued |