Search

Terry D. Cunningham

Examiner (ID: 1940)

Most Active Art Unit
2816
Art Unit(s)
2816, 2504
Total Applications
1191
Issued Applications
935
Pending Applications
36
Abandoned Applications
220

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3594500 [patent_doc_number] => 05497112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'Power-out reset system' [patent_app_type] => 1 [patent_app_number] => 8/274046 [patent_app_country] => US [patent_app_date] => 1994-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9627 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/497/05497112.pdf [firstpage_image] =>[orig_patent_app_number] => 274046 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/274046
Power-out reset system Jul 11, 1994 Issued
Array ( [id] => 3502704 [patent_doc_number] => 05532640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Voltage generator circuit generating stable negative potential' [patent_app_type] => 1 [patent_app_number] => 8/268450 [patent_app_country] => US [patent_app_date] => 1994-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2705 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532640.pdf [firstpage_image] =>[orig_patent_app_number] => 268450 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/268450
Voltage generator circuit generating stable negative potential Jun 29, 1994 Issued
Array ( [id] => 4412930 [patent_doc_number] => 06232822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Semiconductor device including a bipolar transistor biased to produce a negative base current by the impact ionization mechanism' [patent_app_type] => 1 [patent_app_number] => 8/268728 [patent_app_country] => US [patent_app_date] => 1994-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 66 [patent_figures_cnt] => 124 [patent_no_of_words] => 17772 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232822.pdf [firstpage_image] =>[orig_patent_app_number] => 268728 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/268728
Semiconductor device including a bipolar transistor biased to produce a negative base current by the impact ionization mechanism Jun 29, 1994 Issued
Array ( [id] => 4179206 [patent_doc_number] => 06140861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Bias pump arrangement including a signal-transition-detection circuit' [patent_app_type] => 1 [patent_app_number] => 8/266912 [patent_app_country] => US [patent_app_date] => 1994-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 3559 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/140/06140861.pdf [firstpage_image] =>[orig_patent_app_number] => 266912 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/266912
Bias pump arrangement including a signal-transition-detection circuit Jun 26, 1994 Issued
Array ( [id] => 3558781 [patent_doc_number] => 05519346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-21 [patent_title] => 'Selective restart circuit for an electronic device' [patent_app_type] => 1 [patent_app_number] => 8/263595 [patent_app_country] => US [patent_app_date] => 1994-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1267 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/519/05519346.pdf [firstpage_image] =>[orig_patent_app_number] => 263595 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/263595
Selective restart circuit for an electronic device Jun 21, 1994 Issued
08/260915 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING BUILT-IN STEP-DOWN CIRCUIT FOR STEPPING DOWN EXTERNAL POWER SUPPLY VOLTAGE Jun 14, 1994 Abandoned
08/257183 CONSTANT-VOLTAGE GENERATING DEVICE Jun 7, 1994 Abandoned
08/249022 POWER LINE CONNECTION CIRCUIT AND POWER LINE SWITCH IC FOR THE SAME May 24, 1994 Abandoned
Array ( [id] => 3492964 [patent_doc_number] => 05475340 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-12 [patent_title] => 'Active biasing circuit for an epitaxial region in a fault-tolerant, vertical pnp output transistor' [patent_app_type] => 1 [patent_app_number] => 8/247816 [patent_app_country] => US [patent_app_date] => 1994-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2462 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/475/05475340.pdf [firstpage_image] =>[orig_patent_app_number] => 247816 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/247816
Active biasing circuit for an epitaxial region in a fault-tolerant, vertical pnp output transistor May 22, 1994 Issued
08/247835 PULSE SIGNAL GENERATOR AND REDUNDANCY SELECTION SIGNAL GENERATOR May 22, 1994 Abandoned
Array ( [id] => 3437030 [patent_doc_number] => 05463510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Disk drive system having combined clamp/eject switch' [patent_app_type] => 1 [patent_app_number] => 8/246469 [patent_app_country] => US [patent_app_date] => 1994-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2788 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463510.pdf [firstpage_image] =>[orig_patent_app_number] => 246469 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/246469
Disk drive system having combined clamp/eject switch May 17, 1994 Issued
Array ( [id] => 3461224 [patent_doc_number] => 05402020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-28 [patent_title] => 'Low voltage detecting circuit' [patent_app_type] => 1 [patent_app_number] => 8/242056 [patent_app_country] => US [patent_app_date] => 1994-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3578 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/402/05402020.pdf [firstpage_image] =>[orig_patent_app_number] => 242056 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/242056
Low voltage detecting circuit May 12, 1994 Issued
08/119156 FAST TRANSMISSION GATE SWITCH May 5, 1994 Abandoned
Array ( [id] => 3892459 [patent_doc_number] => 05894176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Flexible reset scheme supporting normal system operation, test and emulation modes' [patent_app_type] => 1 [patent_app_number] => 8/238192 [patent_app_country] => US [patent_app_date] => 1994-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2769 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894176.pdf [firstpage_image] =>[orig_patent_app_number] => 238192 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/238192
Flexible reset scheme supporting normal system operation, test and emulation modes May 3, 1994 Issued
08/237949 METHOD AND APPARATUS FOR DETECTING CHANGES IN A CLOCK SIGNAL TO STATIC STATES May 1, 1994 Abandoned
Array ( [id] => 3107976 [patent_doc_number] => 05448188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-05 [patent_title] => 'Signal processing device for providing a signal corresponding to an input signal and for providing a signal which does not correspond to the input signal' [patent_app_type] => 1 [patent_app_number] => 8/223303 [patent_app_country] => US [patent_app_date] => 1994-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 11004 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/448/05448188.pdf [firstpage_image] =>[orig_patent_app_number] => 223303 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/223303
Signal processing device for providing a signal corresponding to an input signal and for providing a signal which does not correspond to the input signal Apr 3, 1994 Issued
08/220571 DYNAMIC RANDOM-ACCESS MEMORY WITH HIGH-SPEED WORD-LINE DRIVER CIRCUIT Mar 30, 1994 Abandoned
Array ( [id] => 3458360 [patent_doc_number] => 05378936 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-03 [patent_title] => 'Voltage level detecting circuit' [patent_app_type] => 1 [patent_app_number] => 8/219865 [patent_app_country] => US [patent_app_date] => 1994-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5714 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 563 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/378/05378936.pdf [firstpage_image] =>[orig_patent_app_number] => 219865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/219865
Voltage level detecting circuit Mar 29, 1994 Issued
Array ( [id] => 3903379 [patent_doc_number] => 05835302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Compensating for variations in torque capability of voice coil motors' [patent_app_type] => 1 [patent_app_number] => 8/215192 [patent_app_country] => US [patent_app_date] => 1994-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 12600 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835302.pdf [firstpage_image] =>[orig_patent_app_number] => 215192 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/215192
Compensating for variations in torque capability of voice coil motors Mar 20, 1994 Issued
Array ( [id] => 3577252 [patent_doc_number] => 05539348 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Precise delay line circuit with predetermined reset time limit' [patent_app_type] => 1 [patent_app_number] => 8/214897 [patent_app_country] => US [patent_app_date] => 1994-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4771 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539348.pdf [firstpage_image] =>[orig_patent_app_number] => 214897 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/214897
Precise delay line circuit with predetermined reset time limit Mar 16, 1994 Issued
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