
Terry D. Cunningham
Examiner (ID: 1940)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816, 2504 |
| Total Applications | 1191 |
| Issued Applications | 935 |
| Pending Applications | 36 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2567317
[patent_doc_number] => 04945260
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-31
[patent_title] => 'Temperature and supply compensated ECL bandgap reference voltage generator'
[patent_app_type] => 1
[patent_app_number] => 7/338583
[patent_app_country] => US
[patent_app_date] => 1989-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2709
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 296
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/945/04945260.pdf
[firstpage_image] =>[orig_patent_app_number] => 338583
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/338583 | Temperature and supply compensated ECL bandgap reference voltage generator | Apr 16, 1989 | Issued |
Array
(
[id] => 2749184
[patent_doc_number] => 05003196
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-26
[patent_title] => 'Wave shaping circuit having a maximum voltage detector and a minimum voltage detector'
[patent_app_type] => 1
[patent_app_number] => 7/338795
[patent_app_country] => US
[patent_app_date] => 1989-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 2750
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/003/05003196.pdf
[firstpage_image] =>[orig_patent_app_number] => 338795
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/338795 | Wave shaping circuit having a maximum voltage detector and a minimum voltage detector | Apr 16, 1989 | Issued |
Array
(
[id] => 2628696
[patent_doc_number] => 04956565
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-09-11
[patent_title] => 'Output circuit with drive current limitation'
[patent_app_type] => 1
[patent_app_number] => 7/337021
[patent_app_country] => US
[patent_app_date] => 1989-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2199
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/956/04956565.pdf
[firstpage_image] =>[orig_patent_app_number] => 337021
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/337021 | Output circuit with drive current limitation | Apr 11, 1989 | Issued |
Array
(
[id] => 2562016
[patent_doc_number] => 04961007
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-02
[patent_title] => 'Substrate bias potential generator of a semiconductor integrated circuit device and a generating method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/337218
[patent_app_country] => US
[patent_app_date] => 1989-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 22
[patent_no_of_words] => 14408
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/961/04961007.pdf
[firstpage_image] =>[orig_patent_app_number] => 337218
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/337218 | Substrate bias potential generator of a semiconductor integrated circuit device and a generating method therefor | Apr 11, 1989 | Issued |
Array
(
[id] => 2582886
[patent_doc_number] => 04973857
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Current divider circuit'
[patent_app_type] => 1
[patent_app_number] => 7/334961
[patent_app_country] => US
[patent_app_date] => 1989-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3474
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/973/04973857.pdf
[firstpage_image] =>[orig_patent_app_number] => 334961
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/334961 | Current divider circuit | Apr 6, 1989 | Issued |
Array
(
[id] => 2637940
[patent_doc_number] => 04952820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-28
[patent_title] => 'Reduction of intermodulation distortion in light emitting diodes'
[patent_app_type] => 1
[patent_app_number] => 7/329052
[patent_app_country] => US
[patent_app_date] => 1989-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2136
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/952/04952820.pdf
[firstpage_image] =>[orig_patent_app_number] => 329052
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/329052 | Reduction of intermodulation distortion in light emitting diodes | Mar 26, 1989 | Issued |
Array
(
[id] => 2567335
[patent_doc_number] => 04945261
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-31
[patent_title] => 'Level and edge sensitive input circuit'
[patent_app_type] => 1
[patent_app_number] => 7/329236
[patent_app_country] => US
[patent_app_date] => 1989-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 3181
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/945/04945261.pdf
[firstpage_image] =>[orig_patent_app_number] => 329236
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/329236 | Level and edge sensitive input circuit | Mar 26, 1989 | Issued |
Array
(
[id] => 2601842
[patent_doc_number] => 04922123
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-01
[patent_title] => 'Supply circuit for a hall sensor multiplication circuit'
[patent_app_type] => 1
[patent_app_number] => 7/324414
[patent_app_country] => US
[patent_app_date] => 1989-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 1447
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 281
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/922/04922123.pdf
[firstpage_image] =>[orig_patent_app_number] => 324414
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/324414 | Supply circuit for a hall sensor multiplication circuit | Mar 15, 1989 | Issued |
Array
(
[id] => 2590297
[patent_doc_number] => 04908529
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-13
[patent_title] => 'Logarithmic amplifier comprising MESFET distributed amplifiers connected in cascade'
[patent_app_type] => 1
[patent_app_number] => 7/321506
[patent_app_country] => US
[patent_app_date] => 1989-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1416
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/908/04908529.pdf
[firstpage_image] =>[orig_patent_app_number] => 321506
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/321506 | Logarithmic amplifier comprising MESFET distributed amplifiers connected in cascade | Mar 8, 1989 | Issued |
Array
(
[id] => 2582984
[patent_doc_number] => 04973862
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'High speed sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 7/320317
[patent_app_country] => US
[patent_app_date] => 1989-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3675
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 326
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/973/04973862.pdf
[firstpage_image] =>[orig_patent_app_number] => 320317
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/320317 | High speed sense amplifier | Mar 6, 1989 | Issued |
Array
(
[id] => 2684615
[patent_doc_number] => 05004938
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-02
[patent_title] => 'MOS analog NOR amplifier and current source therefor'
[patent_app_type] => 1
[patent_app_number] => 7/318383
[patent_app_country] => US
[patent_app_date] => 1989-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2661
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/004/05004938.pdf
[firstpage_image] =>[orig_patent_app_number] => 318383
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/318383 | MOS analog NOR amplifier and current source therefor | Mar 2, 1989 | Issued |
Array
(
[id] => 2710194
[patent_doc_number] => 04992673
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-12
[patent_title] => 'Fast settling voltage to frequency converter for high speed analog to digital conversion'
[patent_app_type] => 1
[patent_app_number] => 7/314996
[patent_app_country] => US
[patent_app_date] => 1989-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 5027
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/992/04992673.pdf
[firstpage_image] =>[orig_patent_app_number] => 314996
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/314996 | Fast settling voltage to frequency converter for high speed analog to digital conversion | Feb 23, 1989 | Issued |
Array
(
[id] => 2636023
[patent_doc_number] => 04937474
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-26
[patent_title] => 'Low power, high noise margin logic gates employing enhancement mode switching FETs'
[patent_app_type] => 1
[patent_app_number] => 7/313838
[patent_app_country] => US
[patent_app_date] => 1989-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 6299
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/937/04937474.pdf
[firstpage_image] =>[orig_patent_app_number] => 313838
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/313838 | Low power, high noise margin logic gates employing enhancement mode switching FETs | Feb 22, 1989 | Issued |
Array
(
[id] => 2666648
[patent_doc_number] => 04947064
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-07
[patent_title] => 'Semiconductor device having a time delay function'
[patent_app_type] => 1
[patent_app_number] => 7/313893
[patent_app_country] => US
[patent_app_date] => 1989-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 2358
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/947/04947064.pdf
[firstpage_image] =>[orig_patent_app_number] => 313893
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/313893 | Semiconductor device having a time delay function | Feb 22, 1989 | Issued |
Array
(
[id] => 2711887
[patent_doc_number] => 05055706
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-08
[patent_title] => 'Delay circuit that resets after pulse-like noise'
[patent_app_type] => 1
[patent_app_number] => 7/311798
[patent_app_country] => US
[patent_app_date] => 1989-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 20
[patent_no_of_words] => 8481
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/055/05055706.pdf
[firstpage_image] =>[orig_patent_app_number] => 311798
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/311798 | Delay circuit that resets after pulse-like noise | Feb 16, 1989 | Issued |
Array
(
[id] => 2639156
[patent_doc_number] => 04952885
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-28
[patent_title] => 'MOS stage with high output resistance particularly for integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/311287
[patent_app_country] => US
[patent_app_date] => 1989-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3148
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/952/04952885.pdf
[firstpage_image] =>[orig_patent_app_number] => 311287
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/311287 | MOS stage with high output resistance particularly for integrated circuits | Feb 14, 1989 | Issued |
Array
(
[id] => 2591512
[patent_doc_number] => 04963772
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-16
[patent_title] => 'Metastable-immune flip-flop arrangement'
[patent_app_type] => 1
[patent_app_number] => 7/307861
[patent_app_country] => US
[patent_app_date] => 1989-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3633
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/963/04963772.pdf
[firstpage_image] =>[orig_patent_app_number] => 307861
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/307861 | Metastable-immune flip-flop arrangement | Feb 6, 1989 | Issued |
Array
(
[id] => 2607076
[patent_doc_number] => 04948989
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-14
[patent_title] => 'Radiation-hardened temperature-compensated voltage reference'
[patent_app_type] => 1
[patent_app_number] => 7/304502
[patent_app_country] => US
[patent_app_date] => 1989-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 15
[patent_no_of_words] => 7597
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/948/04948989.pdf
[firstpage_image] =>[orig_patent_app_number] => 304502
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/304502 | Radiation-hardened temperature-compensated voltage reference | Jan 30, 1989 | Issued |
Array
(
[id] => 2567353
[patent_doc_number] => 04945262
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-31
[patent_title] => 'Voltage limiter apparatus with inherent level shifting employing MOSFETs'
[patent_app_type] => 1
[patent_app_number] => 7/301926
[patent_app_country] => US
[patent_app_date] => 1989-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3434
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/945/04945262.pdf
[firstpage_image] =>[orig_patent_app_number] => 301926
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/301926 | Voltage limiter apparatus with inherent level shifting employing MOSFETs | Jan 25, 1989 | Issued |
Array
(
[id] => 2562107
[patent_doc_number] => 04961012
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-02
[patent_title] => 'Semiconductor integrated circuit device responsive to clock signals having different amplitudes'
[patent_app_type] => 1
[patent_app_number] => 7/302033
[patent_app_country] => US
[patent_app_date] => 1989-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2982
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/961/04961012.pdf
[firstpage_image] =>[orig_patent_app_number] => 302033
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/302033 | Semiconductor integrated circuit device responsive to clock signals having different amplitudes | Jan 25, 1989 | Issued |