Search

Terry K. Cecil

Examiner (ID: 11078, Phone: (571)272-1138 , Office: P/1778 )

Most Active Art Unit
1778
Art Unit(s)
1772, 1723, 1779, 1797, 1778
Total Applications
1945
Issued Applications
1223
Pending Applications
166
Abandoned Applications
570

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3779816 [patent_doc_number] => 05774135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Non-contiguous memory location addressing scheme' [patent_app_type] => 1 [patent_app_number] => 8/743992 [patent_app_country] => US [patent_app_date] => 1996-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4400 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774135.pdf [firstpage_image] =>[orig_patent_app_number] => 743992 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/743992
Non-contiguous memory location addressing scheme Nov 4, 1996 Issued
Array ( [id] => 3936490 [patent_doc_number] => 05953019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Image display controlling apparatus' [patent_app_type] => 1 [patent_app_number] => 8/743255 [patent_app_country] => US [patent_app_date] => 1996-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7036 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953019.pdf [firstpage_image] =>[orig_patent_app_number] => 743255 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/743255
Image display controlling apparatus Nov 3, 1996 Issued
Array ( [id] => 4051686 [patent_doc_number] => 05909224 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Apparatus and method for managing a frame buffer for MPEG video decoding in a PC environment' [patent_app_type] => 1 [patent_app_number] => 8/733436 [patent_app_country] => US [patent_app_date] => 1996-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7022 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909224.pdf [firstpage_image] =>[orig_patent_app_number] => 733436 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/733436
Apparatus and method for managing a frame buffer for MPEG video decoding in a PC environment Oct 17, 1996 Issued
Array ( [id] => 3752545 [patent_doc_number] => 05801718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Video signal processing circuit for monitoring address passing between write addresses and read addresses in a buffer memory' [patent_app_type] => 1 [patent_app_number] => 8/732844 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4162 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801718.pdf [firstpage_image] =>[orig_patent_app_number] => 732844 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/732844
Video signal processing circuit for monitoring address passing between write addresses and read addresses in a buffer memory Oct 14, 1996 Issued
Array ( [id] => 1506442 [patent_doc_number] => 06466216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Computer system with optimized display control' [patent_app_type] => B1 [patent_app_number] => 08/737300 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4451 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466216.pdf [firstpage_image] =>[orig_patent_app_number] => 08737300 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/737300
Computer system with optimized display control Oct 10, 1996 Issued
Array ( [id] => 3884758 [patent_doc_number] => 05825373 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Raster operation lookup and execution' [patent_app_type] => 1 [patent_app_number] => 8/731264 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4795 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825373.pdf [firstpage_image] =>[orig_patent_app_number] => 731264 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/731264
Raster operation lookup and execution Oct 10, 1996 Issued
Array ( [id] => 4199655 [patent_doc_number] => 06154225 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Virtual refresh.TM. architecture for a video-graphics controller' [patent_app_type] => 1 [patent_app_number] => 8/731360 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6963 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/154/06154225.pdf [firstpage_image] =>[orig_patent_app_number] => 731360 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/731360
Virtual refresh.TM. architecture for a video-graphics controller Oct 10, 1996 Issued
Array ( [id] => 3814165 [patent_doc_number] => 05854641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Method and apparatus for display image rotation' [patent_app_type] => 1 [patent_app_number] => 8/721482 [patent_app_country] => US [patent_app_date] => 1996-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 3720 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854641.pdf [firstpage_image] =>[orig_patent_app_number] => 721482 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/721482
Method and apparatus for display image rotation Sep 26, 1996 Issued
Array ( [id] => 3892722 [patent_doc_number] => 05729655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Method and apparatus for speech compression using multi-mode code excited linear predictive coding' [patent_app_type] => 1 [patent_app_number] => 8/716771 [patent_app_country] => US [patent_app_date] => 1996-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 8975 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729655.pdf [firstpage_image] =>[orig_patent_app_number] => 716771 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716771
Method and apparatus for speech compression using multi-mode code excited linear predictive coding Sep 23, 1996 Issued
Array ( [id] => 3820093 [patent_doc_number] => 05812147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Instruction methods for performing data formatting while moving data between memory and a vector register file' [patent_app_type] => 1 [patent_app_number] => 8/716972 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 52 [patent_no_of_words] => 18297 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812147.pdf [firstpage_image] =>[orig_patent_app_number] => 716972 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716972
Instruction methods for performing data formatting while moving data between memory and a vector register file Sep 19, 1996 Issued
Array ( [id] => 4166774 [patent_doc_number] => 06104417 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Unified memory computer architecture with dynamic graphics memory allocation' [patent_app_type] => 1 [patent_app_number] => 8/713779 [patent_app_country] => US [patent_app_date] => 1996-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8549 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104417.pdf [firstpage_image] =>[orig_patent_app_number] => 713779 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/713779
Unified memory computer architecture with dynamic graphics memory allocation Sep 12, 1996 Issued
Array ( [id] => 3967889 [patent_doc_number] => 05900885 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Composite video buffer including incremental video buffer' [patent_app_type] => 1 [patent_app_number] => 8/708122 [patent_app_country] => US [patent_app_date] => 1996-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1177 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/900/05900885.pdf [firstpage_image] =>[orig_patent_app_number] => 708122 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/708122
Composite video buffer including incremental video buffer Sep 2, 1996 Issued
Array ( [id] => 3994273 [patent_doc_number] => 05959639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Computer graphics apparatus utilizing cache memory' [patent_app_type] => 1 [patent_app_number] => 8/695880 [patent_app_country] => US [patent_app_date] => 1996-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 8302 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959639.pdf [firstpage_image] =>[orig_patent_app_number] => 695880 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/695880
Computer graphics apparatus utilizing cache memory Aug 11, 1996 Issued
Array ( [id] => 3936689 [patent_doc_number] => 05877780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Semiconductor chip having multiple independent memory sections, at least one of which includes simultaneously accessible arrays' [patent_app_type] => 1 [patent_app_number] => 8/694922 [patent_app_country] => US [patent_app_date] => 1996-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 14356 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877780.pdf [firstpage_image] =>[orig_patent_app_number] => 694922 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/694922
Semiconductor chip having multiple independent memory sections, at least one of which includes simultaneously accessible arrays Aug 7, 1996 Issued
Array ( [id] => 3805910 [patent_doc_number] => 05828382 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Apparatus for dynamic XY tiled texture caching' [patent_app_type] => 1 [patent_app_number] => 8/691762 [patent_app_country] => US [patent_app_date] => 1996-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6899 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/828/05828382.pdf [firstpage_image] =>[orig_patent_app_number] => 691762 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/691762
Apparatus for dynamic XY tiled texture caching Aug 1, 1996 Issued
08/690424 SYSTEM AND METHOD FOR VIRTUAL DEVICE ACCESS IN A COMPUTER SYSTEM Jul 25, 1996 Abandoned
Array ( [id] => 3989110 [patent_doc_number] => 05905853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Image printing apparatus and method having changeable capacity storage means' [patent_app_type] => 1 [patent_app_number] => 8/677909 [patent_app_country] => US [patent_app_date] => 1996-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2980 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905853.pdf [firstpage_image] =>[orig_patent_app_number] => 677909 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/677909
Image printing apparatus and method having changeable capacity storage means Jul 9, 1996 Issued
Array ( [id] => 3849534 [patent_doc_number] => 05745125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Floating point processor for a three-dimensional graphics accelerator which includes floating point, lighting and set-up cores for improved performance' [patent_app_type] => 1 [patent_app_number] => 8/676096 [patent_app_country] => US [patent_app_date] => 1996-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 16234 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745125.pdf [firstpage_image] =>[orig_patent_app_number] => 676096 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/676096
Floating point processor for a three-dimensional graphics accelerator which includes floating point, lighting and set-up cores for improved performance Jul 1, 1996 Issued
Array ( [id] => 3793642 [patent_doc_number] => 05821949 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Three-dimensional graphics accelerator with direct data channels for improved performance' [patent_app_type] => 1 [patent_app_number] => 8/673492 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12586 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821949.pdf [firstpage_image] =>[orig_patent_app_number] => 673492 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673492
Three-dimensional graphics accelerator with direct data channels for improved performance Jun 30, 1996 Issued
Array ( [id] => 4051954 [patent_doc_number] => 05874969 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Three-dimensional graphics accelerator which implements multiple logical buses using common data lines for improved bus communication' [patent_app_type] => 1 [patent_app_number] => 8/673491 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12536 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 533 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/874/05874969.pdf [firstpage_image] =>[orig_patent_app_number] => 673491 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673491
Three-dimensional graphics accelerator which implements multiple logical buses using common data lines for improved bus communication Jun 30, 1996 Issued
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