
Terry Lee Englund
Examiner (ID: 365)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2842, 2816, 2504, 0 |
| Total Applications | 1072 |
| Issued Applications | 943 |
| Pending Applications | 25 |
| Abandoned Applications | 107 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9706456
[patent_doc_number] => 08831545
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Methods and apparatus for aggregation of guide and frequency map information for multiple frequency networks using upper-level single frequency network'
[patent_app_type] => utility
[patent_app_number] => 12/417520
[patent_app_country] => US
[patent_app_date] => 2009-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8327
[patent_no_of_claims] => 122
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12417520
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/417520 | Methods and apparatus for aggregation of guide and frequency map information for multiple frequency networks using upper-level single frequency network | Apr 1, 2009 | Issued |
Array
(
[id] => 5493865
[patent_doc_number] => 20090261893
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-22
[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING CELL TRANSISTOR AND CELL CAPACITOR'
[patent_app_type] => utility
[patent_app_number] => 12/406365
[patent_app_country] => US
[patent_app_date] => 2009-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12018
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0261/20090261893.pdf
[firstpage_image] =>[orig_patent_app_number] => 12406365
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/406365 | SEMICONDUCTOR DEVICE INCLUDING CELL TRANSISTOR AND CELL CAPACITOR | Mar 17, 2009 | Abandoned |
Array
(
[id] => 8715359
[patent_doc_number] => 08401508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-19
[patent_title] => 'Method and apparatus for mitigation of unwanted signal components in complex sampling receiver'
[patent_app_type] => utility
[patent_app_number] => 12/388720
[patent_app_country] => US
[patent_app_date] => 2009-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3354
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12388720
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/388720 | Method and apparatus for mitigation of unwanted signal components in complex sampling receiver | Feb 18, 2009 | Issued |
Array
(
[id] => 5573437
[patent_doc_number] => 20090140798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-04
[patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING REFERENCE VOLTAGE GENERATION CIRCUIT ATTAINING REDUCED CURRENT CONSUMPTION DURING STAND-BY'
[patent_app_type] => utility
[patent_app_number] => 12/363199
[patent_app_country] => US
[patent_app_date] => 2009-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7515
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20090140798.pdf
[firstpage_image] =>[orig_patent_app_number] => 12363199
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/363199 | SEMICONDUCTOR DEVICE INCLUDING REFERENCE VOLTAGE GENERATION CIRCUIT ATTAINING REDUCED CURRENT CONSUMPTION DURING STAND-BY | Jan 29, 2009 | Abandoned |
Array
(
[id] => 4544582
[patent_doc_number] => 07876148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-25
[patent_title] => 'Low pass filter and lock detector circuit'
[patent_app_type] => utility
[patent_app_number] => 12/344552
[patent_app_country] => US
[patent_app_date] => 2008-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5500
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/876/07876148.pdf
[firstpage_image] =>[orig_patent_app_number] => 12344552
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/344552 | Low pass filter and lock detector circuit | Dec 27, 2008 | Issued |
Array
(
[id] => 4466295
[patent_doc_number] => 07936207
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-03
[patent_title] => 'Internal voltage generator'
[patent_app_type] => utility
[patent_app_number] => 12/343946
[patent_app_country] => US
[patent_app_date] => 2008-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4718
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/936/07936207.pdf
[firstpage_image] =>[orig_patent_app_number] => 12343946
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/343946 | Internal voltage generator | Dec 23, 2008 | Issued |
Array
(
[id] => 7968595
[patent_doc_number] => 07940115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-10
[patent_title] => 'Fuse circuit for semiconductor integrated circuit and control method of the same'
[patent_app_type] => utility
[patent_app_number] => 12/333181
[patent_app_country] => US
[patent_app_date] => 2008-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2380
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/940/07940115.pdf
[firstpage_image] =>[orig_patent_app_number] => 12333181
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/333181 | Fuse circuit for semiconductor integrated circuit and control method of the same | Dec 10, 2008 | Issued |
Array
(
[id] => 124605
[patent_doc_number] => 07705668
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-27
[patent_title] => 'Mobile telephone with interblock control for power conservation'
[patent_app_type] => utility
[patent_app_number] => 12/314379
[patent_app_country] => US
[patent_app_date] => 2008-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7117
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/705/07705668.pdf
[firstpage_image] =>[orig_patent_app_number] => 12314379
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/314379 | Mobile telephone with interblock control for power conservation | Dec 8, 2008 | Issued |
Array
(
[id] => 5573431
[patent_doc_number] => 20090140792
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-04
[patent_title] => 'TEMPERATURE COMPENSATION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/323873
[patent_app_country] => US
[patent_app_date] => 2008-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5144
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20090140792.pdf
[firstpage_image] =>[orig_patent_app_number] => 12323873
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/323873 | Temperature compensation circuit | Nov 25, 2008 | Issued |
Array
(
[id] => 5278878
[patent_doc_number] => 20090131010
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-21
[patent_title] => 'ANALOG-DIGITAL CONVERTER CHIP AND RF-IC CHIP USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/273240
[patent_app_country] => US
[patent_app_date] => 2008-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 8965
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0131/20090131010.pdf
[firstpage_image] =>[orig_patent_app_number] => 12273240
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/273240 | Analog-digital converter chip and RF-IC chip using the same | Nov 17, 2008 | Issued |
Array
(
[id] => 5575676
[patent_doc_number] => 20090143038
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-04
[patent_title] => 'DATA PROCESSING DEVICE WITH BEAM STEERING AND/OR FORMING ANTENNAS'
[patent_app_type] => utility
[patent_app_number] => 12/273126
[patent_app_country] => US
[patent_app_date] => 2008-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7362
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0143/20090143038.pdf
[firstpage_image] =>[orig_patent_app_number] => 12273126
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/273126 | Data processing device with beam steering and/or forming antennas | Nov 17, 2008 | Issued |
Array
(
[id] => 6540914
[patent_doc_number] => 20100124889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-20
[patent_title] => 'ADAPTIVE DELAY ALIGNMENT IN POLAR TRANSMITTERS'
[patent_app_type] => utility
[patent_app_number] => 12/272037
[patent_app_country] => US
[patent_app_date] => 2008-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5709
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20100124889.pdf
[firstpage_image] =>[orig_patent_app_number] => 12272037
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/272037 | Adaptive delay alignment in polar transmitters | Nov 16, 2008 | Issued |
Array
(
[id] => 6521926
[patent_doc_number] => 20100123466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-20
[patent_title] => 'System and Method for Corner Frequency Compensation'
[patent_app_type] => utility
[patent_app_number] => 12/272008
[patent_app_country] => US
[patent_app_date] => 2008-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6470
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0123/20100123466.pdf
[firstpage_image] =>[orig_patent_app_number] => 12272008
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/272008 | System and Method for Corner Frequency Compensation | Nov 16, 2008 | Abandoned |
Array
(
[id] => 7716689
[patent_doc_number] => 08095102
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-10
[patent_title] => 'Phase-lock loop'
[patent_app_type] => utility
[patent_app_number] => 12/272152
[patent_app_country] => US
[patent_app_date] => 2008-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3391
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/095/08095102.pdf
[firstpage_image] =>[orig_patent_app_number] => 12272152
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/272152 | Phase-lock loop | Nov 16, 2008 | Issued |
Array
(
[id] => 6355550
[patent_doc_number] => 20100073074
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'MICROPROCESSOR WITH SELECTIVE SUBSTRATE BIASING FOR CLOCK-GATED FUNCTIONAL BLOCKS'
[patent_app_type] => utility
[patent_app_number] => 12/237483
[patent_app_country] => US
[patent_app_date] => 2008-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8894
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0073/20100073074.pdf
[firstpage_image] =>[orig_patent_app_number] => 12237483
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/237483 | Microprocessor with selective substrate biasing for clock-gated functional blocks | Sep 24, 2008 | Issued |
Array
(
[id] => 6355540
[patent_doc_number] => 20100073073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-03-25
[patent_title] => 'MICROPROCESSOR WITH SUBSTRATE BIAS CLAMPS'
[patent_app_type] => utility
[patent_app_number] => 12/237463
[patent_app_country] => US
[patent_app_date] => 2008-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9708
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0073/20100073073.pdf
[firstpage_image] =>[orig_patent_app_number] => 12237463
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/237463 | Microprocessor with substrate bias clamps | Sep 24, 2008 | Issued |
Array
(
[id] => 5269111
[patent_doc_number] => 20090072886
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-19
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, REDUNDANCY SYSTEM, AND REDUNDANCY METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/208837
[patent_app_country] => US
[patent_app_date] => 2008-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9374
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0072/20090072886.pdf
[firstpage_image] =>[orig_patent_app_number] => 12208837
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/208837 | Semiconductor integrated circuit device, redundancy system, and redundancy method for latching and transmitting fuse data | Sep 10, 2008 | Issued |
Array
(
[id] => 5488631
[patent_doc_number] => 20090289702
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'CURRENT GENERATOR'
[patent_app_type] => utility
[patent_app_number] => 12/204794
[patent_app_country] => US
[patent_app_date] => 2008-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5727
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0289/20090289702.pdf
[firstpage_image] =>[orig_patent_app_number] => 12204794
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/204794 | Current generator | Sep 3, 2008 | Issued |
Array
(
[id] => 5294310
[patent_doc_number] => 20090009236
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-08
[patent_title] => 'Step-down circuit with stabilized output voltage'
[patent_app_type] => utility
[patent_app_number] => 12/230588
[patent_app_country] => US
[patent_app_date] => 2008-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 14338
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0009/20090009236.pdf
[firstpage_image] =>[orig_patent_app_number] => 12230588
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/230588 | Step-down circuit with stabilized output voltage | Sep 1, 2008 | Abandoned |
Array
(
[id] => 5328381
[patent_doc_number] => 20090108858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-30
[patent_title] => 'METHODS AND SYSTEMS FOR CALIBRATING RC CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 12/195585
[patent_app_country] => US
[patent_app_date] => 2008-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3860
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20090108858.pdf
[firstpage_image] =>[orig_patent_app_number] => 12195585
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/195585 | METHODS AND SYSTEMS FOR CALIBRATING RC CIRCUITS | Aug 20, 2008 | Abandoned |