Search

Terry Lee Englund

Examiner (ID: 2480)

Most Active Art Unit
2816
Art Unit(s)
0, 2816, 2504, 2842
Total Applications
1072
Issued Applications
943
Pending Applications
25
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4801041 [patent_doc_number] => 20080012628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'A DUAL MODE VOLTAGE SUPPLY CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/457312 [patent_app_country] => US [patent_app_date] => 2006-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5112 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20080012628.pdf [firstpage_image] =>[orig_patent_app_number] => 11457312 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/457312
Dual mode voltage supply circuit Jul 12, 2006 Issued
Array ( [id] => 4930873 [patent_doc_number] => 20080001648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'DEVICE HAVING TEMPERATURE COMPENSATION FOR PROVIDING CONSTANT CURRENT THROUGH UTILIZING COMPENSATING UNIT WITH POSITIVE TEMPERATURE COEFFICIENT' [patent_app_type] => utility [patent_app_number] => 11/428542 [patent_app_country] => US [patent_app_date] => 2006-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2996 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20080001648.pdf [firstpage_image] =>[orig_patent_app_number] => 11428542 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/428542
Device having temperature compensation for providing constant current through utilizing compensating unit with positive temperature coefficient Jul 2, 2006 Issued
Array ( [id] => 311602 [patent_doc_number] => 07528634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'High voltage comparator using sliding input low voltage devices' [patent_app_type] => utility [patent_app_number] => 11/427033 [patent_app_country] => US [patent_app_date] => 2006-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8878 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/528/07528634.pdf [firstpage_image] =>[orig_patent_app_number] => 11427033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/427033
High voltage comparator using sliding input low voltage devices Jun 27, 2006 Issued
Array ( [id] => 143526 [patent_doc_number] => 07692478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Semiconductor device and booster circuit' [patent_app_type] => utility [patent_app_number] => 11/426153 [patent_app_country] => US [patent_app_date] => 2006-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4232 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/692/07692478.pdf [firstpage_image] =>[orig_patent_app_number] => 11426153 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/426153
Semiconductor device and booster circuit Jun 22, 2006 Issued
Array ( [id] => 5202783 [patent_doc_number] => 20070024262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Integrated circuit apparatus and method of compensating a current' [patent_app_type] => utility [patent_app_number] => 11/455376 [patent_app_country] => US [patent_app_date] => 2006-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2712 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20070024262.pdf [firstpage_image] =>[orig_patent_app_number] => 11455376 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/455376
Integrated circuit apparatus and method of compensating a current Jun 18, 2006 Issued
Array ( [id] => 810851 [patent_doc_number] => 07417492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Regulator' [patent_app_type] => utility [patent_app_number] => 11/453982 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2850 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/417/07417492.pdf [firstpage_image] =>[orig_patent_app_number] => 11453982 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/453982
Regulator Jun 15, 2006 Issued
Array ( [id] => 370320 [patent_doc_number] => 07477095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'Current mirror architectures' [patent_app_type] => utility [patent_app_number] => 11/453702 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 10088 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/477/07477095.pdf [firstpage_image] =>[orig_patent_app_number] => 11453702 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/453702
Current mirror architectures Jun 14, 2006 Issued
Array ( [id] => 7589379 [patent_doc_number] => 07663412 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-02-16 [patent_title] => 'Method and apparatus for providing leakage current compensation in electrical circuits' [patent_app_type] => utility [patent_app_number] => 11/451220 [patent_app_country] => US [patent_app_date] => 2006-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2734 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663412.pdf [firstpage_image] =>[orig_patent_app_number] => 11451220 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/451220
Method and apparatus for providing leakage current compensation in electrical circuits Jun 11, 2006 Issued
Array ( [id] => 560145 [patent_doc_number] => 07468627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-23 [patent_title] => 'Multiple circuit blocks with interblock control and power conservation' [patent_app_type] => utility [patent_app_number] => 11/448743 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7051 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/468/07468627.pdf [firstpage_image] =>[orig_patent_app_number] => 11448743 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448743
Multiple circuit blocks with interblock control and power conservation Jun 7, 2006 Issued
Array ( [id] => 5854961 [patent_doc_number] => 20060226894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Multiple circuit blocks with interblock control and power conservation' [patent_app_type] => utility [patent_app_number] => 11/448739 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7006 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226894.pdf [firstpage_image] =>[orig_patent_app_number] => 11448739 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448739
Multiple circuit blocks with interblock control and power conservation Jun 7, 2006 Issued
Array ( [id] => 814182 [patent_doc_number] => 07414459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Architecture for implementing an integrated capacitance' [patent_app_type] => utility [patent_app_number] => 11/444287 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4996 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/414/07414459.pdf [firstpage_image] =>[orig_patent_app_number] => 11444287 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444287
Architecture for implementing an integrated capacitance May 30, 2006 Issued
Array ( [id] => 5780688 [patent_doc_number] => 20060202728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Charge pump clock for non-volatile memories' [patent_app_type] => utility [patent_app_number] => 11/431734 [patent_app_country] => US [patent_app_date] => 2006-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4039 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202728.pdf [firstpage_image] =>[orig_patent_app_number] => 11431734 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/431734
Charge pump clock for non-volatile memories May 9, 2006 Issued
Array ( [id] => 5089510 [patent_doc_number] => 20070229149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'VOLTAGE REGULATOR HAVING HIGH VOLTAGE PROTECTION' [patent_app_type] => utility [patent_app_number] => 11/278108 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1834 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20070229149.pdf [firstpage_image] =>[orig_patent_app_number] => 11278108 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/278108
VOLTAGE REGULATOR HAVING HIGH VOLTAGE PROTECTION Mar 29, 2006 Abandoned
Array ( [id] => 5583344 [patent_doc_number] => 20090102546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'COMPOSITE BAND-PASS FILTER AND METHOD OF FILTERING QUADRATURE SIGNALS' [patent_app_type] => utility [patent_app_number] => 12/293285 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4716 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20090102546.pdf [firstpage_image] =>[orig_patent_app_number] => 12293285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/293285
COMPOSITE BAND-PASS FILTER AND METHOD OF FILTERING QUADRATURE SIGNALS Mar 16, 2006 Abandoned
Array ( [id] => 5653366 [patent_doc_number] => 20060139101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Step-down circuit with stabilized voltage' [patent_app_type] => utility [patent_app_number] => 11/344166 [patent_app_country] => US [patent_app_date] => 2006-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14329 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20060139101.pdf [firstpage_image] =>[orig_patent_app_number] => 11344166 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/344166
Step-down circuit with stabilized output voltage Jan 31, 2006 Issued
Array ( [id] => 5646496 [patent_doc_number] => 20060132228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Multiple circuit blocks with interblock control and power conservation' [patent_app_type] => utility [patent_app_number] => 11/340488 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6973 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20060132228.pdf [firstpage_image] =>[orig_patent_app_number] => 11340488 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/340488
Multiple circuit blocks with interblock control and power conservation Jan 26, 2006 Issued
Array ( [id] => 5186499 [patent_doc_number] => 20070164807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Fuse repair circuit and its operating method' [patent_app_type] => utility [patent_app_number] => 11/331108 [patent_app_country] => US [patent_app_date] => 2006-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2893 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20070164807.pdf [firstpage_image] =>[orig_patent_app_number] => 11331108 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/331108
Fuse repair circuit and its operating method Jan 12, 2006 Abandoned
Array ( [id] => 5832688 [patent_doc_number] => 20060244518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Internal voltage generator' [patent_app_type] => utility [patent_app_number] => 11/321873 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 14342 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20060244518.pdf [firstpage_image] =>[orig_patent_app_number] => 11321873 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321873
Internal voltage generator Dec 29, 2005 Issued
Array ( [id] => 896600 [patent_doc_number] => 07342427 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-03-11 [patent_title] => 'Automatic clock based power-down circuit' [patent_app_type] => utility [patent_app_number] => 11/311782 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3549 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/342/07342427.pdf [firstpage_image] =>[orig_patent_app_number] => 11311782 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/311782
Automatic clock based power-down circuit Dec 18, 2005 Issued
Array ( [id] => 5117385 [patent_doc_number] => 20070139099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Charge pump regulation control for improved power efficiency' [patent_app_type] => utility [patent_app_number] => 11/303387 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4336 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20070139099.pdf [firstpage_image] =>[orig_patent_app_number] => 11303387 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/303387
Charge pump regulation control for improved power efficiency Dec 15, 2005 Abandoned
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