Tesfaldet Bocure

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Array ( [id] => 9104673 [patent_doc_number] => 20130277805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/450888 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3753 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13450888 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 9091261 [patent_doc_number] => 20130270572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'GROUP III-N HFET WITH A GRADED BARRIER LAYER' [patent_app_type] => utility [patent_app_number] => 13/448348 [patent_app_country] => US [patent_app_date] => 2012-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2130 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13448348 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 8439563 [patent_doc_number] => 20120256180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => 'METHOD OF EVALUATING A SEMICONDUCTOR WAFER DICING PROCESS' [patent_app_type] => utility [patent_app_number] => 13/443778 [patent_app_country] => US [patent_app_date] => 2012-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3843 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13443778 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 8298860 [patent_doc_number] => 20120181417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'METHOD AND IMAGE SENSOR WITH EXTENDED PIXEL DYNAMIC RANGE INCORPORATING TRANSFER GATE WITH POTENTIAL WELL' [patent_app_type] => utility [patent_app_number] => 13/431272 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3662 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13431272 [rel_patent_id] =>[rel_patent_doc_number] =>)

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