Thai Q. Phan

Array ( [id] => 8715679 [patent_doc_number] => 08401828 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-03-19 [patent_title] => 'Methods and systems for analog object fetch in mixed-signal simulation' [patent_app_type] => utility [patent_app_number] => 12/837406 [patent_app_country] => US [patent_app_date] => 2010-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8381 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12837406 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8632361 [patent_doc_number] => 08364449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Process for automatic creation of wiring simulation' [patent_app_type] => utility [patent_app_number] => 12/831405 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12831405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8472230 [patent_doc_number] => 08301422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Process for creating a library of algorithmic representations of electronic equipment' [patent_app_type] => utility [patent_app_number] => 12/831408 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7640 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12831408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8246785 [patent_doc_number] => 08204722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Simulation apparatus, simulation method, and simulation program' [patent_app_type] => utility [patent_app_number] => 12/830661 [patent_app_country] => US [patent_app_date] => 2010-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 13873 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/204/08204722.pdf [firstpage_image] =>[orig_patent_app_number] => 12830661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8246783 [patent_doc_number] => 08204721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Apparatus and method for emulation of process variation induced in split process semiconductor wafers' [patent_app_type] => utility [patent_app_number] => 12/825269 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7614 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/204/08204721.pdf [firstpage_image] =>[orig_patent_app_number] => 12825269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8997582 [patent_doc_number] => 08521485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Simulation of integrated circuit power grid networks' [patent_app_type] => utility [patent_app_number] => 12/824110 [patent_app_country] => US [patent_app_date] => 2010-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8997582 [patent_doc_number] => 08521485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Simulation of integrated circuit power grid networks' [patent_app_type] => utility [patent_app_number] => 12/824110 [patent_app_country] => US [patent_app_date] => 2010-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8997582 [patent_doc_number] => 08521485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Simulation of integrated circuit power grid networks' [patent_app_type] => utility [patent_app_number] => 12/824110 [patent_app_country] => US [patent_app_date] => 2010-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8997600 [patent_doc_number] => 08521503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Providing compartmentalized security in product reviews' [patent_app_type] => utility [patent_app_number] => 12/817455 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12817455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6366246 [patent_doc_number] => 20100251196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'Method and System for Designing a Structural Level Description of an Electronic Circuit' [patent_app_type] => utility [patent_app_number] => 12/816119 [patent_app_country] => US [patent_app_date] => 2010-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20100251196.pdf [firstpage_image] =>[orig_patent_app_number] => 12816119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6393200 [patent_doc_number] => 20100318342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'MODEL GENERATING METHOD AND DEVICE AND RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 12/797363 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5880 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20100318342.pdf [firstpage_image] =>[orig_patent_app_number] => 12797363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9218016 [patent_doc_number] => 08630824 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-14 [patent_title] => 'Comprehending waveforms of a circuit design' [patent_app_type] => utility [patent_app_number] => 12/797468 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 10029 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12797468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8958543 [patent_doc_number] => 08504332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Computer product, design support apparatus, and design support method' [patent_app_type] => utility [patent_app_number] => 12/792979 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 42 [patent_no_of_words] => 22143 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8997580 [patent_doc_number] => 08521483 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Method and apparatus for concurrent design of modules across different design entry tools targeted to single simulation' [patent_app_type] => utility [patent_app_number] => 12/792292 [patent_app_country] => US [patent_app_date] => 2010-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 17798 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8740711 [patent_doc_number] => 08412496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Simulation system, method, and program' [patent_app_type] => utility [patent_app_number] => 12/791096 [patent_app_country] => US [patent_app_date] => 2010-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6514 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12791096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7695413 [patent_doc_number] => 20110231177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'SIMULATING VIRTUAL OPTICAL DISC RECORDER BY USING A STORAGE DEVICE AND METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 12/786177 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2802 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231177.pdf [firstpage_image] =>[orig_patent_app_number] => 12786177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7568762 [patent_doc_number] => 20110288825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'METHOD AND SYSTEM FOR EQUIVALENCE CHECKING' [patent_app_type] => utility [patent_app_number] => 12/785986 [patent_app_country] => US [patent_app_date] => 2010-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3438 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8751648 [patent_doc_number] => 08417490 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-04-09 [patent_title] => 'System and method for the configuration of an automotive vehicle with modeled sensors' [patent_app_type] => utility [patent_app_number] => 12/777608 [patent_app_country] => US [patent_app_date] => 2010-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 18801 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12777608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6506220 [patent_doc_number] => 20100219358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'GRID TRANSPARENCY AND GRID HOLE PATTERN CONTROL FOR ION BEAM UNIFORMITY' [patent_app_type] => utility [patent_app_number] => 12/777034 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4448 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20100219358.pdf [firstpage_image] =>[orig_patent_app_number] => 12777034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10137014 [patent_doc_number] => 09170332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Risk calculation apparatus' [patent_app_type] => utility [patent_app_number] => 13/697201 [patent_app_country] => US [patent_app_date] => 2010-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4936 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13697201 [rel_patent_id] =>[rel_patent_doc_number] =>)