Search

Thai T. Vuong

Examiner (ID: 7492, Phone: (571)272-7802 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
4174, 2829
Total Applications
231
Issued Applications
187
Pending Applications
0
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9026976 [patent_doc_number] => 08536558 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-17 [patent_title] => 'RRAM structure with improved memory margin' [patent_app_type] => utility [patent_app_number] => 13/562646 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 5368 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562646 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562646
RRAM structure with improved memory margin Jul 30, 2012 Issued
Array ( [id] => 9312404 [patent_doc_number] => 08653626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Package structures including a capacitor and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 13/551676 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3227 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551676 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551676
Package structures including a capacitor and methods of forming the same Jul 17, 2012 Issued
Array ( [id] => 9266606 [patent_doc_number] => 20140021523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'DRAM WITH DUAL LEVEL WORD LINES' [patent_app_type] => utility [patent_app_number] => 13/551766 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 8315 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551766 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551766
DRAM with dual level word lines Jul 17, 2012 Issued
Array ( [id] => 10876900 [patent_doc_number] => 08901690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Semiconductor structure for photon detection' [patent_app_type] => utility [patent_app_number] => 13/551732 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5251 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551732 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551732
Semiconductor structure for photon detection Jul 17, 2012 Issued
Array ( [id] => 9300225 [patent_doc_number] => 08648456 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-11 [patent_title] => 'Embedded integrated circuit package and method for manufacturing an embedded integrated circuit package' [patent_app_type] => utility [patent_app_number] => 13/551656 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 5153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551656 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551656
Embedded integrated circuit package and method for manufacturing an embedded integrated circuit package Jul 17, 2012 Issued
Array ( [id] => 9220823 [patent_doc_number] => 20140015598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'SEMICONDUCTOR DEVICE PACKAGES INCLUDING THERMALLY INSULATING MATERIALS AND METHODS OF MAKING AND USING SUCH SEMICONDUCTOR PACKAGES' [patent_app_type] => utility [patent_app_number] => 13/547296 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5334 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547296 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547296
Semiconductor device packages including thermally insulating materials and methods of making and using such semiconductor packages Jul 11, 2012 Issued
Array ( [id] => 8730217 [patent_doc_number] => 20130075786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/547349 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547349 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547349
SEMICONDUCTOR DEVICE Jul 11, 2012 Abandoned
Array ( [id] => 9233255 [patent_doc_number] => 08598560 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-03 [patent_title] => 'Resistive memory elements exhibiting increased interfacial adhesion strength, methods of forming the same, and related resistive memory cells and memory devices' [patent_app_type] => utility [patent_app_number] => 13/547270 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 10080 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547270
Resistive memory elements exhibiting increased interfacial adhesion strength, methods of forming the same, and related resistive memory cells and memory devices Jul 11, 2012 Issued
Array ( [id] => 9414209 [patent_doc_number] => 08698246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'High-voltage oxide transistor and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/547200 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 30 [patent_no_of_words] => 9332 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547200 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547200
High-voltage oxide transistor and method of manufacturing the same Jul 11, 2012 Issued
Array ( [id] => 9441493 [patent_doc_number] => 08710607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Method and apparatus for image sensor packaging' [patent_app_type] => utility [patent_app_number] => 13/547269 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4134 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547269 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547269
Method and apparatus for image sensor packaging Jul 11, 2012 Issued
Array ( [id] => 10053694 [patent_doc_number] => 09093581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Structures and devices based on boron nitride and boron nitride-III-nitride heterostructures' [patent_app_type] => utility [patent_app_number] => 13/482030 [patent_app_country] => US [patent_app_date] => 2012-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 61 [patent_no_of_words] => 11636 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13482030 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/482030
Structures and devices based on boron nitride and boron nitride-III-nitride heterostructures May 28, 2012 Issued
Array ( [id] => 9131972 [patent_doc_number] => 20130292685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'Structures and Devices Based on Boron Nitride and Boron Nitride-III-Nitride Heterostructures' [patent_app_type] => utility [patent_app_number] => 13/464977 [patent_app_country] => US [patent_app_date] => 2012-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 11866 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464977 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/464977
Structures and Devices Based on Boron Nitride and Boron Nitride-III-Nitride Heterostructures May 4, 2012 Abandoned
Array ( [id] => 9823953 [patent_doc_number] => 08933438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Photodiode' [patent_app_type] => utility [patent_app_number] => 13/461250 [patent_app_country] => US [patent_app_date] => 2012-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5216 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13461250 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/461250
Photodiode Apr 30, 2012 Issued
Array ( [id] => 8359134 [patent_doc_number] => 20120214287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/459305 [patent_app_country] => US [patent_app_date] => 2012-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10305 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459305 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/459305
Method for fabricating a semiconductor device having stress/strain and protrusion Apr 29, 2012 Issued
Array ( [id] => 9427515 [patent_doc_number] => 08703589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Flat panel display and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/454965 [patent_app_country] => US [patent_app_date] => 2012-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2883 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13454965 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/454965
Flat panel display and method of manufacturing the same Apr 23, 2012 Issued
Array ( [id] => 10845121 [patent_doc_number] => 08872301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Dual profile shallow trench isolation apparatus and system' [patent_app_type] => utility [patent_app_number] => 13/454924 [patent_app_country] => US [patent_app_date] => 2012-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2959 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13454924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/454924
Dual profile shallow trench isolation apparatus and system Apr 23, 2012 Issued
Array ( [id] => 9104679 [patent_doc_number] => 20130277810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'METHOD FOR FORMING HEAT SINK WITH THROUGH SILICON VIAS' [patent_app_type] => utility [patent_app_number] => 13/453762 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453762 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/453762
METHOD FOR FORMING HEAT SINK WITH THROUGH SILICON VIAS Apr 22, 2012 Abandoned
Array ( [id] => 9104634 [patent_doc_number] => 20130277765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING GRADED GATE STACK, RELATED METHOD AND DESIGN STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/453131 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453131 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/453131
SEMICONDUCTOR DEVICE INCLUDING GRADED GATE STACK, RELATED METHOD AND DESIGN STRUCTURE Apr 22, 2012 Abandoned
Array ( [id] => 9104610 [patent_doc_number] => 20130277741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'LDMOS DEVICE WITH FIELD EFFECT STRUCTURE TO CONTROL BREAKDOWN VOLTAGE, AND METHODS OF MAKING SUCH A DEVICE' [patent_app_type] => utility [patent_app_number] => 13/453222 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7172 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/453222
LDMOS DEVICE WITH FIELD EFFECT STRUCTURE TO CONTROL BREAKDOWN VOLTAGE, AND METHODS OF MAKING SUCH A DEVICE Apr 22, 2012 Abandoned
Array ( [id] => 10844979 [patent_doc_number] => 08872156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Group III nitride semiconductor light emitting device and method of fabricating group III nitride semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 13/453718 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13413 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 378 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453718 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/453718
Group III nitride semiconductor light emitting device and method of fabricating group III nitride semiconductor light emitting device Apr 22, 2012 Issued
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