Thai T. Vuong

Array ( [id] => 9068735 [patent_doc_number] => 20130260491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'METHOD FOR MAKING LIGHT EMITTING DIODES' [patent_app_type] => utility [patent_app_number] => 13/728018 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13728018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8994941 [patent_doc_number] => 08518825 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Method to manufacture trench-first copper interconnection' [patent_app_type] => utility [patent_app_number] => 13/726532 [patent_app_country] => US [patent_app_date] => 2012-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 2223 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13726532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9121487 [patent_doc_number] => 20130288409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'METHOD FOR MANUFACTURING LIGHT EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 13/726193 [patent_app_country] => US [patent_app_date] => 2012-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1257 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13726193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9561383 [patent_doc_number] => 20140179097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'DEPOSITION APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/725853 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3796 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9561382 [patent_doc_number] => 20140179095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'Methods and Systems for Controlling Gate Dielectric Interfaces of MOSFETs' [patent_app_type] => utility [patent_app_number] => 13/725812 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9977418 [patent_doc_number] => 09023729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-05 [patent_title] => 'Epitaxy level packaging' [patent_app_type] => utility [patent_app_number] => 13/724155 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4094 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724155 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8866155 [patent_doc_number] => 20130149858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'METHOD OF MANUFACTURING BUMP' [patent_app_type] => utility [patent_app_number] => 13/710586 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5667 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10073639 [patent_doc_number] => 09112003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Selective formation of metallic films on metallic surfaces' [patent_app_type] => utility [patent_app_number] => 13/708863 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10289 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13708863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10370572 [patent_doc_number] => 20150255577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'METHOD FOR MANUFACTURING MOSFET' [patent_app_type] => utility [patent_app_number] => 14/430690 [patent_app_country] => US [patent_app_date] => 2012-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4030 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14430690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10370284 [patent_doc_number] => 20150255289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/430569 [patent_app_country] => US [patent_app_date] => 2012-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3081 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14430569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8921432 [patent_doc_number] => 08487372 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-16 [patent_title] => 'Trench MOSFET layout with trenched floating gates and trenched channel stop gates in termination' [patent_app_type] => utility [patent_app_number] => 13/650346 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 5637 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10009733 [patent_doc_number] => 09053255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Semiconductor structure and method of generating masks for making integrated circuit' [patent_app_type] => utility [patent_app_number] => 13/650859 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 7702 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11225210 [patent_doc_number] => 09452924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'MEMS devices and fabrication methods thereof' [patent_app_type] => utility [patent_app_number] => 13/650867 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 57 [patent_no_of_words] => 6988 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8838807 [patent_doc_number] => 20130134435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'HIGH ELECTRON MOBILITY TRANSISTOR STRUCTURE WITH IMPROVED BREAKDOWN VOLTAGE PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 13/650610 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8764990 [patent_doc_number] => 20130093027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'LAYOUT DATA CREATION DEVICE FOR CREATING LAYOUT DATA OF PILLAR-TYPE TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/650875 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12854 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13650875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9850753 [patent_doc_number] => 08952489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Semiconductor package and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/647740 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 6186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13647740 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8765030 [patent_doc_number] => 20130093067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'WAFER LEVEL APPLIED RF SHIELDS' [patent_app_type] => utility [patent_app_number] => 13/648166 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1741 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13648166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9957861 [patent_doc_number] => 09006065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Plasma doping a non-planar semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/648127 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 7306 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13648127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9823421 [patent_doc_number] => 08932905 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-13 [patent_title] => 'Semiconductor circuit system for a composite structure' [patent_app_type] => utility [patent_app_number] => 13/647813 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8507 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13647813 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8742665 [patent_doc_number] => 20130082382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/630593 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 8825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630593 [rel_patent_id] =>[rel_patent_doc_number] =>)