Search

Thai T. Vuong

Examiner (ID: 7492, Phone: (571)272-7802 , Office: P/2829 )

Most Active Art Unit
2829
Art Unit(s)
4174, 2829
Total Applications
231
Issued Applications
187
Pending Applications
0
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9394059 [patent_doc_number] => 20140091465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'LEADFRAME HAVING SLOPED METAL TERMINALS FOR WIREBONDING' [patent_app_type] => utility [patent_app_number] => 13/630494 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2855 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630494 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/630494
LEADFRAME HAVING SLOPED METAL TERMINALS FOR WIREBONDING Sep 27, 2012 Abandoned
Array ( [id] => 9393954 [patent_doc_number] => 20140091360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'TRENCH CONFINED EPITAXIALLY GROWN DEVICE LAYER(S)' [patent_app_type] => utility [patent_app_number] => 13/630527 [patent_app_country] => US [patent_app_date] => 2012-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8206 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13630527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/630527
Trench confined epitaxially grown device layer(s) Sep 27, 2012 Issued
Array ( [id] => 9649263 [patent_doc_number] => 08803281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/628137 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3215 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628137 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628137
Semiconductor device Sep 26, 2012 Issued
Array ( [id] => 9380871 [patent_doc_number] => 20140084352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'FERROELECTRIC RANDOM ACCESS MEMORY WITH OPTIMIZED HARDMASK' [patent_app_type] => utility [patent_app_number] => 13/628715 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5856 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628715 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628715
Ferroelectric random access memory with optimized hardmask Sep 26, 2012 Issued
Array ( [id] => 9145438 [patent_doc_number] => 20130299961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/628549 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 6885 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628549 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628549
Semiconductor package with stacked semiconductor chips Sep 26, 2012 Issued
Array ( [id] => 8742600 [patent_doc_number] => 20130082317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/628135 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4611 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628135 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628135
Semiconductor memory device and semiconductor memory element Sep 26, 2012 Issued
Array ( [id] => 9937926 [patent_doc_number] => 08987738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Photoelectric conversion device' [patent_app_type] => utility [patent_app_number] => 13/628458 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 10796 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628458 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628458
Photoelectric conversion device Sep 26, 2012 Issued
Array ( [id] => 9380940 [patent_doc_number] => 20140084421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'Adhesion Promoter Apparatus and Method' [patent_app_type] => utility [patent_app_number] => 13/628927 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628927
Adhesion promoter apparatus and method Sep 26, 2012 Issued
Array ( [id] => 9844119 [patent_doc_number] => 08946035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Replacement channels for semiconductor devices and methods for forming the same using dopant concentration boost' [patent_app_type] => utility [patent_app_number] => 13/628359 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4148 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628359 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628359
Replacement channels for semiconductor devices and methods for forming the same using dopant concentration boost Sep 26, 2012 Issued
Array ( [id] => 9312342 [patent_doc_number] => 08653563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/628405 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3405 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628405 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628405
Semiconductor device Sep 26, 2012 Issued
Array ( [id] => 9380906 [patent_doc_number] => 20140084387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'NON-PLANAR III-V FIELD EFFECT TRANSISTORS WITH CONFORMAL METAL GATE ELECTRODE & NITROGEN DOPING OF GATE DIELECTRIC INTERFACE' [patent_app_type] => utility [patent_app_number] => 13/627971 [patent_app_country] => US [patent_app_date] => 2012-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7337 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13627971 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/627971
Non-planar III-V field effect transistors with conformal metal gate electrode and nitrogen doping of gate dielectric interface Sep 25, 2012 Issued
Array ( [id] => 10010406 [patent_doc_number] => 09053931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Nitride semiconductor wafer, nitride semiconductor device, and method for manufacturing nitride semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 13/626265 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 13337 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13626265 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/626265
Nitride semiconductor wafer, nitride semiconductor device, and method for manufacturing nitride semiconductor wafer Sep 24, 2012 Issued
Array ( [id] => 9158845 [patent_doc_number] => 20130307122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'BIPOLAR TRANSISTOR WITH EMBEDDED EPITAXIAL EXTERNAL BASE REGION AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/625211 [patent_app_country] => US [patent_app_date] => 2012-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13625211 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/625211
BIPOLAR TRANSISTOR WITH EMBEDDED EPITAXIAL EXTERNAL BASE REGION AND METHOD OF FORMING THE SAME Sep 23, 2012 Abandoned
Array ( [id] => 9171629 [patent_doc_number] => 20130313614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'METAL SILICIDE SELF-ALIGNED SiGe HETEROJUNCTION BIPOLAR TRANSISTOR AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/625233 [patent_app_country] => US [patent_app_date] => 2012-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10045 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13625233 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/625233
METAL SILICIDE SELF-ALIGNED SiGe HETEROJUNCTION BIPOLAR TRANSISTOR AND METHOD OF FORMING THE SAME Sep 23, 2012 Abandoned
Array ( [id] => 8742526 [patent_doc_number] => 20130082243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'TRANSISTOR DEVICE WITH REDUCED GATE RESISTANCE' [patent_app_type] => utility [patent_app_number] => 13/610381 [patent_app_country] => US [patent_app_date] => 2012-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4212 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610381 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/610381
Transistor device with reduced gate resistance Sep 10, 2012 Issued
Array ( [id] => 9692373 [patent_doc_number] => 08822971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Semiconductor memory device having three-dimensionally arranged resistive memory cells' [patent_app_type] => utility [patent_app_number] => 13/606789 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 47 [patent_no_of_words] => 10760 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606789 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/606789
Semiconductor memory device having three-dimensionally arranged resistive memory cells Sep 6, 2012 Issued
Array ( [id] => 9291263 [patent_doc_number] => 20140034897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'METHOD FOR FORMING A PCRAM WITH LOW RESET CURRENT' [patent_app_type] => utility [patent_app_number] => 13/562641 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 4047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562641 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562641
Method for forming a PCRAM with low reset current Jul 30, 2012 Issued
Array ( [id] => 9704601 [patent_doc_number] => 08829672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Semiconductor package, package structure and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 13/563052 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3190 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13563052 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/563052
Semiconductor package, package structure and fabrication method thereof Jul 30, 2012 Issued
Array ( [id] => 8982700 [patent_doc_number] => 08513819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Low loop wire bonding' [patent_app_type] => utility [patent_app_number] => 13/563015 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 5449 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13563015 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/563015
Low loop wire bonding Jul 30, 2012 Issued
Array ( [id] => 9021011 [patent_doc_number] => 08530997 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-10 [patent_title] => 'Double seal ring' [patent_app_type] => utility [patent_app_number] => 13/562776 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562776 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562776
Double seal ring Jul 30, 2012 Issued
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