
Than Vinh Nguyen
Examiner (ID: 3446, Phone: (571)272-4198 , Office: P/2138 )
| Most Active Art Unit | 2138 |
| Art Unit(s) | 2188, 2138, 2187, 2787, 2759, 2309, 2751 |
| Total Applications | 1861 |
| Issued Applications | 1652 |
| Pending Applications | 79 |
| Abandoned Applications | 148 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20609798
[patent_doc_number] => 12585400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-24
[patent_title] => Block write cache replication model
[patent_app_type] => utility
[patent_app_number] => 18/594982
[patent_app_country] => US
[patent_app_date] => 2024-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8860
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594982
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/594982 | Block write cache replication model | Mar 3, 2024 | Issued |
Array
(
[id] => 20195312
[patent_doc_number] => 20250272022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-28
[patent_title] => Optimized XOR Loading To SRAM and HMB
[patent_app_type] => utility
[patent_app_number] => 18/584081
[patent_app_country] => US
[patent_app_date] => 2024-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1293
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584081
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/584081 | Optimized XOR loading to SRAM and HMB | Feb 21, 2024 | Issued |
Array
(
[id] => 20166720
[patent_doc_number] => 20250258767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-14
[patent_title] => SHARED MEMORY IN HIGH PERFORMANCE COMPUTING (HPC) MESSAGING SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/441831
[patent_app_country] => US
[patent_app_date] => 2024-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5602
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18441831
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/441831 | Shared memory in high performance computing (HPC) messaging systems | Feb 13, 2024 | Issued |
Array
(
[id] => 19872860
[patent_doc_number] => 12265722
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-01
[patent_title] => Generating and maintaining a batch action clipboard for web-based platforms
[patent_app_type] => utility
[patent_app_number] => 18/431796
[patent_app_country] => US
[patent_app_date] => 2024-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 17234
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18431796
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/431796 | Generating and maintaining a batch action clipboard for web-based platforms | Feb 1, 2024 | Issued |
Array
(
[id] => 19942464
[patent_doc_number] => 12314595
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-05-27
[patent_title] => Method and apparatus for performance-based port selection
[patent_app_type] => utility
[patent_app_number] => 18/420908
[patent_app_country] => US
[patent_app_date] => 2024-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3588
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 322
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18420908
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/420908 | Method and apparatus for performance-based port selection | Jan 23, 2024 | Issued |
Array
(
[id] => 19174385
[patent_doc_number] => 20240160359
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/419895
[patent_app_country] => US
[patent_app_date] => 2024-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12204
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419895
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/419895 | Modified read counter incrementing scheme in a memory sub-system | Jan 22, 2024 | Issued |
Array
(
[id] => 19174408
[patent_doc_number] => 20240160382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => STORAGE DEVICE AND HOST DEVICE FOR OPTIMIZING MODEL FOR CALCULATING DELAY TIME OF THE STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/418065
[patent_app_country] => US
[patent_app_date] => 2024-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13378
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418065
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/418065 | Storage device and host device for optimizing model for calculating delay time of the storage device | Jan 18, 2024 | Issued |
Array
(
[id] => 19099579
[patent_doc_number] => 20240118807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-11
[patent_title] => DIE FAMILY MANAGEMENT ON A MEMORY DEVICE USING BLOCK FAMILY ERROR AVOIDANCE
[patent_app_type] => utility
[patent_app_number] => 18/543170
[patent_app_country] => US
[patent_app_date] => 2023-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8872
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543170
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/543170 | Die family management on a memory device using block family error avoidance | Dec 17, 2023 | Issued |
Array
(
[id] => 19963274
[patent_doc_number] => 12332774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Allocation of memory within a data type-specific memory heap
[patent_app_type] => utility
[patent_app_number] => 18/539213
[patent_app_country] => US
[patent_app_date] => 2023-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 18
[patent_no_of_words] => 4955
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539213
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/539213 | Allocation of memory within a data type-specific memory heap | Dec 12, 2023 | Issued |
Array
(
[id] => 19925030
[patent_doc_number] => 12299312
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-13
[patent_title] => Electronic device managing duplicate requests and method of operating the same
[patent_app_type] => utility
[patent_app_number] => 18/535515
[patent_app_country] => US
[patent_app_date] => 2023-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 29
[patent_no_of_words] => 7891
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18535515
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/535515 | Electronic device managing duplicate requests and method of operating the same | Dec 10, 2023 | Issued |
Array
(
[id] => 20257690
[patent_doc_number] => 12430040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-30
[patent_title] => Method, electronic device, and computer program product for data replication
[patent_app_type] => utility
[patent_app_number] => 18/536166
[patent_app_country] => US
[patent_app_date] => 2023-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5316
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536166
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/536166 | Method, electronic device, and computer program product for data replication | Dec 10, 2023 | Issued |
Array
(
[id] => 19069318
[patent_doc_number] => 20240103744
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => BLOCK ALLOCATION FOR PERSISTENT MEMORY DURING AGGREGATE TRANSITION
[patent_app_type] => utility
[patent_app_number] => 18/528556
[patent_app_country] => US
[patent_app_date] => 2023-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16705
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528556
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/528556 | Block allocation for persistent memory during aggregate transition | Dec 3, 2023 | Issued |
Array
(
[id] => 19899413
[patent_doc_number] => 12277337
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-04-15
[patent_title] => Automatic storage configuration system
[patent_app_type] => utility
[patent_app_number] => 18/522345
[patent_app_country] => US
[patent_app_date] => 2023-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 22
[patent_no_of_words] => 3859
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522345
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/522345 | Automatic storage configuration system | Nov 28, 2023 | Issued |
Array
(
[id] => 19885903
[patent_doc_number] => 12271620
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-08
[patent_title] => Techniques for improved write performance modes
[patent_app_type] => utility
[patent_app_number] => 18/521693
[patent_app_country] => US
[patent_app_date] => 2023-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 16004
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521693
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/521693 | Techniques for improved write performance modes | Nov 27, 2023 | Issued |
Array
(
[id] => 20159890
[patent_doc_number] => 12386516
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Systems and methods host and device cooperation for managing a memory of the device
[patent_app_type] => utility
[patent_app_number] => 18/521664
[patent_app_country] => US
[patent_app_date] => 2023-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 3898
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521664
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/521664 | Systems and methods host and device cooperation for managing a memory of the device | Nov 27, 2023 | Issued |
Array
(
[id] => 19084891
[patent_doc_number] => 20240111692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-04
[patent_title] => PRIORITY BASED ARBITRATION
[patent_app_type] => utility
[patent_app_number] => 18/519234
[patent_app_country] => US
[patent_app_date] => 2023-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14620
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519234
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/519234 | Priority based arbitration | Nov 26, 2023 | Issued |
Array
(
[id] => 19204598
[patent_doc_number] => 20240176497
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => PARTIAL ARRAY REFRESH TIMING
[patent_app_type] => utility
[patent_app_number] => 18/519359
[patent_app_country] => US
[patent_app_date] => 2023-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8629
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519359
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/519359 | Partial array refresh timing | Nov 26, 2023 | Issued |
Array
(
[id] => 19036267
[patent_doc_number] => 20240086082
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => MEMORY CONTROLLER FOR SHARED MEMORY ACCESS AND METHOD FOR USE IN MEMORY CONTROLLER
[patent_app_type] => utility
[patent_app_number] => 18/517406
[patent_app_country] => US
[patent_app_date] => 2023-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12120
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517406
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/517406 | Data replication and recovery using journaled snapshot replicated | Nov 21, 2023 | Issued |
Array
(
[id] => 19036511
[patent_doc_number] => 20240086326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => Cache Write Overlap Handling
[patent_app_type] => utility
[patent_app_number] => 18/515932
[patent_app_country] => US
[patent_app_date] => 2023-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515932
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/515932 | Cache write overlap handling | Nov 20, 2023 | Issued |
Array
(
[id] => 19036250
[patent_doc_number] => 20240086065
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THREAD PERFORMANCE
[patent_app_type] => utility
[patent_app_number] => 18/512261
[patent_app_country] => US
[patent_app_date] => 2023-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6489
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512261
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/512261 | Delayed snoop for improved multi-process false sharing parallel thread performance | Nov 16, 2023 | Issued |