
Than Vinh Nguyen
Examiner (ID: 3446, Phone: (571)272-4198 , Office: P/2138 )
| Most Active Art Unit | 2138 |
| Art Unit(s) | 2188, 2138, 2187, 2787, 2759, 2309, 2751 |
| Total Applications | 1861 |
| Issued Applications | 1652 |
| Pending Applications | 79 |
| Abandoned Applications | 148 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6115375
[patent_doc_number] => 20020174311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-21
[patent_title] => 'Method and apparatus for coordinating memory operations among diversely-located memory components'
[patent_app_type] => new
[patent_app_number] => 09/841911
[patent_app_country] => US
[patent_app_date] => 2001-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 30500
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20020174311.pdf
[firstpage_image] =>[orig_patent_app_number] => 09841911
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/841911 | Method and apparatus for coordinating memory operations among diversely-located memory components | Apr 23, 2001 | Issued |
Array
(
[id] => 1243128
[patent_doc_number] => 06684305
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-01-27
[patent_title] => 'Multiprocessor system implementing virtual memory using a shared memory, and a page replacement method for maintaining paged memory coherence'
[patent_app_type] => B1
[patent_app_number] => 09/841469
[patent_app_country] => US
[patent_app_date] => 2001-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9414
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 398
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/684/06684305.pdf
[firstpage_image] =>[orig_patent_app_number] => 09841469
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/841469 | Multiprocessor system implementing virtual memory using a shared memory, and a page replacement method for maintaining paged memory coherence | Apr 23, 2001 | Issued |
Array
(
[id] => 5803484
[patent_doc_number] => 20020010825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-24
[patent_title] => 'Memory resource arbitrator for multiple gate arrays'
[patent_app_type] => new
[patent_app_number] => 09/841701
[patent_app_country] => US
[patent_app_date] => 2001-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4268
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20020010825.pdf
[firstpage_image] =>[orig_patent_app_number] => 09841701
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/841701 | Memory resource arbitrator for multiple gate arrays | Apr 22, 2001 | Abandoned |
Array
(
[id] => 1421207
[patent_doc_number] => 06542971
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-01
[patent_title] => 'Memory access system and method employing an auxiliary buffer'
[patent_app_type] => B1
[patent_app_number] => 09/841057
[patent_app_country] => US
[patent_app_date] => 2001-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4146
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/542/06542971.pdf
[firstpage_image] =>[orig_patent_app_number] => 09841057
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/841057 | Memory access system and method employing an auxiliary buffer | Apr 22, 2001 | Issued |
Array
(
[id] => 6181324
[patent_doc_number] => 20020156977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-24
[patent_title] => 'Virtual caching of regenerable data'
[patent_app_type] => new
[patent_app_number] => 09/840723
[patent_app_country] => US
[patent_app_date] => 2001-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12001
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0156/20020156977.pdf
[firstpage_image] =>[orig_patent_app_number] => 09840723
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/840723 | Virtual caching of regenerable data | Apr 22, 2001 | Abandoned |
Array
(
[id] => 1088596
[patent_doc_number] => 06832295
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-14
[patent_title] => 'Methods and systems for extending an application\'s address space'
[patent_app_type] => B1
[patent_app_number] => 09/837952
[patent_app_country] => US
[patent_app_date] => 2001-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 10648
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 25
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/832/06832295.pdf
[firstpage_image] =>[orig_patent_app_number] => 09837952
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/837952 | Methods and systems for extending an application's address space | Apr 18, 2001 | Issued |
| 09/829646 | Computer system with transparent data migration between storage volumes | Apr 9, 2001 | Abandoned |
Array
(
[id] => 7613861
[patent_doc_number] => 06898670
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-24
[patent_title] => 'Storage virtualization in a storage area network'
[patent_app_type] => utility
[patent_app_number] => 10/257426
[patent_app_country] => US
[patent_app_date] => 2001-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 20
[patent_no_of_words] => 12996
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/898/06898670.pdf
[firstpage_image] =>[orig_patent_app_number] => 10257426
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/257426 | Storage virtualization in a storage area network | Apr 3, 2001 | Issued |
Array
(
[id] => 1143533
[patent_doc_number] => 06785773
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-31
[patent_title] => 'Verification of global coherence in a multi-node NUMA system'
[patent_app_type] => B2
[patent_app_number] => 09/821078
[patent_app_country] => US
[patent_app_date] => 2001-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4273
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/785/06785773.pdf
[firstpage_image] =>[orig_patent_app_number] => 09821078
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/821078 | Verification of global coherence in a multi-node NUMA system | Mar 28, 2001 | Issued |
Array
(
[id] => 1088613
[patent_doc_number] => 06832299
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-14
[patent_title] => 'System and method for assigning storage in a storage network in accordance with stored management information'
[patent_app_type] => B2
[patent_app_number] => 09/811458
[patent_app_country] => US
[patent_app_date] => 2001-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 5190
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/832/06832299.pdf
[firstpage_image] =>[orig_patent_app_number] => 09811458
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/811458 | System and method for assigning storage in a storage network in accordance with stored management information | Mar 19, 2001 | Issued |
Array
(
[id] => 1326809
[patent_doc_number] => 06609180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-08-19
[patent_title] => 'Fiber channel connection storage controller'
[patent_app_type] => B2
[patent_app_number] => 09/804253
[patent_app_country] => US
[patent_app_date] => 2001-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 6345
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/609/06609180.pdf
[firstpage_image] =>[orig_patent_app_number] => 09804253
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/804253 | Fiber channel connection storage controller | Mar 12, 2001 | Issued |
Array
(
[id] => 1431040
[patent_doc_number] => 06507896
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-01-14
[patent_title] => 'Protocol for use in accessing a storage region across a network'
[patent_app_type] => B2
[patent_app_number] => 09/804252
[patent_app_country] => US
[patent_app_date] => 2001-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 6345
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/507/06507896.pdf
[firstpage_image] =>[orig_patent_app_number] => 09804252
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/804252 | Protocol for use in accessing a storage region across a network | Mar 12, 2001 | Issued |
Array
(
[id] => 6908565
[patent_doc_number] => 20010011332
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-02
[patent_title] => 'Fiber channel connection storage controller'
[patent_app_type] => new
[patent_app_number] => 09/804245
[patent_app_country] => US
[patent_app_date] => 2001-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6414
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0011/20010011332.pdf
[firstpage_image] =>[orig_patent_app_number] => 09804245
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/804245 | Method for preventing unauthorized access to storage volumes | Mar 12, 2001 | Issued |
Array
(
[id] => 7029732
[patent_doc_number] => 20010014933
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-16
[patent_title] => 'Memory management table producing method and memory device'
[patent_app_type] => new
[patent_app_number] => 09/801671
[patent_app_country] => US
[patent_app_date] => 2001-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 10122
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20010014933.pdf
[firstpage_image] =>[orig_patent_app_number] => 09801671
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/801671 | Memory management table producing method and memory device | Mar 8, 2001 | Issued |
Array
(
[id] => 1430388
[patent_doc_number] => 06526490
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-02-25
[patent_title] => 'Data processing systems with process monitor'
[patent_app_type] => B2
[patent_app_number] => 09/801654
[patent_app_country] => US
[patent_app_date] => 2001-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1456
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/526/06526490.pdf
[firstpage_image] =>[orig_patent_app_number] => 09801654
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/801654 | Data processing systems with process monitor | Mar 8, 2001 | Issued |
Array
(
[id] => 6988800
[patent_doc_number] => 20010037474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'Process, data processing device, service provision server, back-up server and program modules for backing-up data'
[patent_app_type] => new
[patent_app_number] => 09/801694
[patent_app_country] => US
[patent_app_date] => 2001-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5426
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0037/20010037474.pdf
[firstpage_image] =>[orig_patent_app_number] => 09801694
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/801694 | Process, data processing device, service provision server, back-up server and program modules for backing-up data | Mar 8, 2001 | Issued |
Array
(
[id] => 6051395
[patent_doc_number] => 20020169919
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-14
[patent_title] => 'Column address path circuit and method for memory devices having a burst access mode'
[patent_app_type] => new
[patent_app_number] => 09/802384
[patent_app_country] => US
[patent_app_date] => 2001-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6469
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0169/20020169919.pdf
[firstpage_image] =>[orig_patent_app_number] => 09802384
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/802384 | Column address path circuit and method for memory devices having a burst access mode | Mar 8, 2001 | Issued |
Array
(
[id] => 1429831
[patent_doc_number] => 06510500
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-01-21
[patent_title] => 'System and method for minimizing message transactions for fault-tolerant snapshots in a dual-controller environment'
[patent_app_type] => B2
[patent_app_number] => 09/802827
[patent_app_country] => US
[patent_app_date] => 2001-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 4802
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/510/06510500.pdf
[firstpage_image] =>[orig_patent_app_number] => 09802827
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/802827 | System and method for minimizing message transactions for fault-tolerant snapshots in a dual-controller environment | Mar 8, 2001 | Issued |
Array
(
[id] => 6451373
[patent_doc_number] => 20020129220
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Reducing resource collisions associated with memory units in a multi-level hierarchy memory system'
[patent_app_type] => new
[patent_app_number] => 09/801610
[patent_app_country] => US
[patent_app_date] => 2001-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6342
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0129/20020129220.pdf
[firstpage_image] =>[orig_patent_app_number] => 09801610
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/801610 | Reducing resource collisions associated with memory units in a multi-level hierarchy memory system | Mar 7, 2001 | Issued |
Array
(
[id] => 6450990
[patent_doc_number] => 20020129193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Tri-stating output buffer during initialization of synchronous memory'
[patent_app_type] => new
[patent_app_number] => 09/802269
[patent_app_country] => US
[patent_app_date] => 2001-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3375
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0129/20020129193.pdf
[firstpage_image] =>[orig_patent_app_number] => 09802269
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/802269 | Tri-stating output buffer during initialization of synchronous memory | Mar 7, 2001 | Issued |