Search

Than Vinh Nguyen

Examiner (ID: 3446, Phone: (571)272-4198 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2188, 2138, 2187, 2787, 2759, 2309, 2751
Total Applications
1861
Issued Applications
1652
Pending Applications
79
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1075155 [patent_doc_number] => 06839823 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-04 [patent_title] => 'Increased reliability of data stored on flash memory in applications sensitive to power-loss' [patent_app_type] => utility [patent_app_number] => 09/675578 [patent_app_country] => US [patent_app_date] => 2000-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 9641 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839823.pdf [firstpage_image] =>[orig_patent_app_number] => 09675578 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/675578
Increased reliability of data stored on flash memory in applications sensitive to power-loss Sep 28, 2000 Issued
Array ( [id] => 1432394 [patent_doc_number] => 06505286 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'User specifiable allocation of memory for processes in a multiprocessor computer having a non-uniform memory architecture' [patent_app_type] => B1 [patent_app_number] => 09/668948 [patent_app_country] => US [patent_app_date] => 2000-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/505/06505286.pdf [firstpage_image] =>[orig_patent_app_number] => 09668948 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/668948
User specifiable allocation of memory for processes in a multiprocessor computer having a non-uniform memory architecture Sep 21, 2000 Issued
Array ( [id] => 1258350 [patent_doc_number] => 06671772 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'Hierarchical file system structure for enhancing disk transfer efficiency' [patent_app_type] => B1 [patent_app_number] => 09/665965 [patent_app_country] => US [patent_app_date] => 2000-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7598 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671772.pdf [firstpage_image] =>[orig_patent_app_number] => 09665965 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/665965
Hierarchical file system structure for enhancing disk transfer efficiency Sep 19, 2000 Issued
Array ( [id] => 1311169 [patent_doc_number] => 06625687 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing' [patent_app_type] => B1 [patent_app_number] => 09/665238 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4812 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625687.pdf [firstpage_image] =>[orig_patent_app_number] => 09665238 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/665238
Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing Sep 17, 2000 Issued
Array ( [id] => 4412431 [patent_doc_number] => 06298429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-02 [patent_title] => 'Memory address generator capable of row-major and column-major sweeps' [patent_app_type] => 1 [patent_app_number] => 9/660032 [patent_app_country] => US [patent_app_date] => 2000-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 8155 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/298/06298429.pdf [firstpage_image] =>[orig_patent_app_number] => 660032 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/660032
Memory address generator capable of row-major and column-major sweeps Sep 11, 2000 Issued
Array ( [id] => 1314324 [patent_doc_number] => 06622207 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Interpolation looping of prioritized audio samples in cache connected to system bus' [patent_app_type] => B1 [patent_app_number] => 09/654969 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8915 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622207.pdf [firstpage_image] =>[orig_patent_app_number] => 09654969 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/654969
Interpolation looping of prioritized audio samples in cache connected to system bus Sep 4, 2000 Issued
Array ( [id] => 4373943 [patent_doc_number] => 06292867 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Data processing system' [patent_app_type] => 1 [patent_app_number] => 9/641913 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4946 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292867.pdf [firstpage_image] =>[orig_patent_app_number] => 641913 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641913
Data processing system Aug 20, 2000 Issued
Array ( [id] => 7645892 [patent_doc_number] => 06477631 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Memory device with pipelined address path' [patent_app_type] => B1 [patent_app_number] => 09/611155 [patent_app_country] => US [patent_app_date] => 2000-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4764 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/477/06477631.pdf [firstpage_image] =>[orig_patent_app_number] => 09611155 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/611155
Memory device with pipelined address path Jul 5, 2000 Issued
Array ( [id] => 702040 [patent_doc_number] => 07073020 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-04 [patent_title] => 'Method for message transfer in computer storage system' [patent_app_type] => utility [patent_app_number] => 09/606734 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 18099 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/073/07073020.pdf [firstpage_image] =>[orig_patent_app_number] => 09606734 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/606734
Method for message transfer in computer storage system Jun 28, 2000 Issued
Array ( [id] => 1519645 [patent_doc_number] => 06421759 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Single-cycle variable period buffer manager for disk controllers' [patent_app_type] => B1 [patent_app_number] => 09/596330 [patent_app_country] => US [patent_app_date] => 2000-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5162 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/421/06421759.pdf [firstpage_image] =>[orig_patent_app_number] => 09596330 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/596330
Single-cycle variable period buffer manager for disk controllers Jun 15, 2000 Issued
Array ( [id] => 1400851 [patent_doc_number] => 06564285 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Synchronous interface for a nonvolatile memory' [patent_app_type] => B1 [patent_app_number] => 09/595327 [patent_app_country] => US [patent_app_date] => 2000-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 18449 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564285.pdf [firstpage_image] =>[orig_patent_app_number] => 09595327 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/595327
Synchronous interface for a nonvolatile memory Jun 13, 2000 Issued
Array ( [id] => 1088580 [patent_doc_number] => 06832293 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-14 [patent_title] => 'Audio playback apparatus and method for resuming interrupted playback recording' [patent_app_type] => B1 [patent_app_number] => 09/580909 [patent_app_country] => US [patent_app_date] => 2000-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 78 [patent_figures_cnt] => 117 [patent_no_of_words] => 38687 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/832/06832293.pdf [firstpage_image] =>[orig_patent_app_number] => 09580909 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/580909
Audio playback apparatus and method for resuming interrupted playback recording May 25, 2000 Issued
Array ( [id] => 1462410 [patent_doc_number] => 06427190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Configurable cache allowing cache-type and buffer-type access' [patent_app_type] => B1 [patent_app_number] => 09/570402 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8836 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427190.pdf [firstpage_image] =>[orig_patent_app_number] => 09570402 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/570402
Configurable cache allowing cache-type and buffer-type access May 11, 2000 Issued
Array ( [id] => 4381324 [patent_doc_number] => 06256715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'System and method of performing gateway access' [patent_app_type] => 1 [patent_app_number] => 9/570397 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8895 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256715.pdf [firstpage_image] =>[orig_patent_app_number] => 570397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/570397
System and method of performing gateway access May 11, 2000 Issued
Array ( [id] => 4294615 [patent_doc_number] => 06324618 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Optical disk reproducing apparatus' [patent_app_type] => 1 [patent_app_number] => 9/563433 [patent_app_country] => US [patent_app_date] => 2000-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3097 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324618.pdf [firstpage_image] =>[orig_patent_app_number] => 563433 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563433
Optical disk reproducing apparatus May 2, 2000 Issued
Array ( [id] => 1210396 [patent_doc_number] => 06718454 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Systems and methods for prefetch operations to reduce latency associated with memory access' [patent_app_type] => B1 [patent_app_number] => 09/563060 [patent_app_country] => US [patent_app_date] => 2000-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3528 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718454.pdf [firstpage_image] =>[orig_patent_app_number] => 09563060 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563060
Systems and methods for prefetch operations to reduce latency associated with memory access Apr 28, 2000 Issued
Array ( [id] => 1284513 [patent_doc_number] => 06651139 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Multiprocessor system' [patent_app_type] => B1 [patent_app_number] => 09/517624 [patent_app_country] => US [patent_app_date] => 2000-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 6022 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/651/06651139.pdf [firstpage_image] =>[orig_patent_app_number] => 09517624 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/517624
Multiprocessor system Mar 2, 2000 Issued
Array ( [id] => 1052587 [patent_doc_number] => 06862662 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-01 [patent_title] => 'High density storage scheme for semiconductor memory' [patent_app_type] => utility [patent_app_number] => 09/518338 [patent_app_country] => US [patent_app_date] => 2000-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2089 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862662.pdf [firstpage_image] =>[orig_patent_app_number] => 09518338 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/518338
High density storage scheme for semiconductor memory Mar 2, 2000 Issued
Array ( [id] => 1474982 [patent_doc_number] => 06408372 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Data processing control device' [patent_app_type] => B1 [patent_app_number] => 09/517577 [patent_app_country] => US [patent_app_date] => 2000-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7844 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/408/06408372.pdf [firstpage_image] =>[orig_patent_app_number] => 09517577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/517577
Data processing control device Mar 1, 2000 Issued
Array ( [id] => 6115353 [patent_doc_number] => 20020174303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'BRANCH-PREDICTION DRIVEN INSTRUCTION PREFETCH' [patent_app_type] => new [patent_app_number] => 09/514973 [patent_app_country] => US [patent_app_date] => 2000-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3545 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20020174303.pdf [firstpage_image] =>[orig_patent_app_number] => 09514973 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/514973
Branch-prediction driven instruction prefetch Feb 28, 2000 Issued
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