Search

Than Vinh Nguyen

Examiner (ID: 3446, Phone: (571)272-4198 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2188, 2138, 2187, 2787, 2759, 2309, 2751
Total Applications
1861
Issued Applications
1652
Pending Applications
79
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4337148 [patent_doc_number] => 06249847 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Computer system with synchronous memory arbiter that permits asynchronous memory requests' [patent_app_type] => 1 [patent_app_number] => 9/134057 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6069 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249847.pdf [firstpage_image] =>[orig_patent_app_number] => 134057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134057
Computer system with synchronous memory arbiter that permits asynchronous memory requests Aug 13, 1998 Issued
Array ( [id] => 4403916 [patent_doc_number] => 06263405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 9/134336 [patent_app_country] => US [patent_app_date] => 1998-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 15990 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/263/06263405.pdf [firstpage_image] =>[orig_patent_app_number] => 134336 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/134336
Multiprocessor system Aug 13, 1998 Issued
Array ( [id] => 1526478 [patent_doc_number] => 06353878 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Remote control of backup media in a secondary storage subsystem through access to a primary storage subsystem' [patent_app_type] => B1 [patent_app_number] => 09/133885 [patent_app_country] => US [patent_app_date] => 1998-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 15511 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353878.pdf [firstpage_image] =>[orig_patent_app_number] => 09133885 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/133885
Remote control of backup media in a secondary storage subsystem through access to a primary storage subsystem Aug 12, 1998 Issued
Array ( [id] => 4007040 [patent_doc_number] => 05960467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Apparatus for efficiently providing memory operands for instructions' [patent_app_type] => 1 [patent_app_number] => 9/133340 [patent_app_country] => US [patent_app_date] => 1998-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 16885 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/960/05960467.pdf [firstpage_image] =>[orig_patent_app_number] => 133340 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/133340
Apparatus for efficiently providing memory operands for instructions Aug 12, 1998 Issued
Array ( [id] => 4298691 [patent_doc_number] => 06282622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'System, method, and program for detecting and assuring DRAM arrays' [patent_app_type] => 1 [patent_app_number] => 9/131814 [patent_app_country] => US [patent_app_date] => 1998-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3576 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282622.pdf [firstpage_image] =>[orig_patent_app_number] => 131814 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131814
System, method, and program for detecting and assuring DRAM arrays Aug 9, 1998 Issued
Array ( [id] => 4114576 [patent_doc_number] => 06049857 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Apparatus and method for translating addresses utilizing an ATU implemented within a network interface card' [patent_app_type] => 1 [patent_app_number] => 9/121647 [patent_app_country] => US [patent_app_date] => 1998-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6201 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049857.pdf [firstpage_image] =>[orig_patent_app_number] => 121647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/121647
Apparatus and method for translating addresses utilizing an ATU implemented within a network interface card Jul 22, 1998 Issued
Array ( [id] => 1271906 [patent_doc_number] => 06662286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Information processing method and information processing apparatus' [patent_app_type] => B2 [patent_app_number] => 09/029170 [patent_app_country] => US [patent_app_date] => 1998-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 14211 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/662/06662286.pdf [firstpage_image] =>[orig_patent_app_number] => 09029170 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/029170
Information processing method and information processing apparatus Jun 30, 1998 Issued
09/000184 SYSTEMS AND METHODS FOR ACCESSING A DATA STORAGE DEVICE Jun 18, 1998 Abandoned
Array ( [id] => 4298675 [patent_doc_number] => 06282621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Method and apparatus for reclaiming memory' [patent_app_type] => 1 [patent_app_number] => 9/096116 [patent_app_country] => US [patent_app_date] => 1998-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6115 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/282/06282621.pdf [firstpage_image] =>[orig_patent_app_number] => 096116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/096116
Method and apparatus for reclaiming memory Jun 10, 1998 Issued
Array ( [id] => 4422215 [patent_doc_number] => 06233658 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Memory write and read control' [patent_app_type] => 1 [patent_app_number] => 9/088515 [patent_app_country] => US [patent_app_date] => 1998-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3793 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233658.pdf [firstpage_image] =>[orig_patent_app_number] => 088515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/088515
Memory write and read control Jun 1, 1998 Issued
09/089177 HARD DISK DRIVES EMPLOYING HIGH SPEED DISTRIBUTION BUS Jun 1, 1998 Abandoned
Array ( [id] => 4403841 [patent_doc_number] => 06263399 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Microprocessor to NAND flash interface' [patent_app_type] => 1 [patent_app_number] => 9/089626 [patent_app_country] => US [patent_app_date] => 1998-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3280 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/263/06263399.pdf [firstpage_image] =>[orig_patent_app_number] => 089626 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/089626
Microprocessor to NAND flash interface May 31, 1998 Issued
Array ( [id] => 4424754 [patent_doc_number] => 06230244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Memory device with read access controlled by code' [patent_app_type] => 1 [patent_app_number] => 9/087902 [patent_app_country] => US [patent_app_date] => 1998-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 33 [patent_no_of_words] => 10142 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230244.pdf [firstpage_image] =>[orig_patent_app_number] => 087902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/087902
Memory device with read access controlled by code May 31, 1998 Issued
Array ( [id] => 4155963 [patent_doc_number] => 06122713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Dual port shared memory system including semaphores for high priority and low priority requestors' [patent_app_type] => 1 [patent_app_number] => 9/088542 [patent_app_country] => US [patent_app_date] => 1998-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122713.pdf [firstpage_image] =>[orig_patent_app_number] => 088542 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/088542
Dual port shared memory system including semaphores for high priority and low priority requestors May 31, 1998 Issued
Array ( [id] => 4252334 [patent_doc_number] => 06076135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Information medium having a plurality of recording surfaces' [patent_app_type] => 1 [patent_app_number] => 9/084931 [patent_app_country] => US [patent_app_date] => 1998-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3192 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/076/06076135.pdf [firstpage_image] =>[orig_patent_app_number] => 084931 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/084931
Information medium having a plurality of recording surfaces May 27, 1998 Issued
Array ( [id] => 1595919 [patent_doc_number] => 06484245 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Apparatus for and method of accessing a storage region across a network' [patent_app_type] => B1 [patent_app_number] => 09/085864 [patent_app_country] => US [patent_app_date] => 1998-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6323 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484245.pdf [firstpage_image] =>[orig_patent_app_number] => 09085864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085864
Apparatus for and method of accessing a storage region across a network May 27, 1998 Issued
Array ( [id] => 4179110 [patent_doc_number] => 06115788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Multi-drive array with improved data transfer rate performance' [patent_app_type] => 1 [patent_app_number] => 9/079349 [patent_app_country] => US [patent_app_date] => 1998-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6517 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115788.pdf [firstpage_image] =>[orig_patent_app_number] => 079349 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/079349
Multi-drive array with improved data transfer rate performance May 14, 1998 Issued
Array ( [id] => 4167154 [patent_doc_number] => 06065093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'High bandwidth narrow I/O memory device with command stacking' [patent_app_type] => 1 [patent_app_number] => 9/079572 [patent_app_country] => US [patent_app_date] => 1998-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2788 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065093.pdf [firstpage_image] =>[orig_patent_app_number] => 079572 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/079572
High bandwidth narrow I/O memory device with command stacking May 14, 1998 Issued
Array ( [id] => 4423657 [patent_doc_number] => 06240485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Method and apparatus for implementing a learn instruction in a depth cascaded content addressable memory system' [patent_app_type] => 1 [patent_app_number] => 9/076336 [patent_app_country] => US [patent_app_date] => 1998-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 12256 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240485.pdf [firstpage_image] =>[orig_patent_app_number] => 076336 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/076336
Method and apparatus for implementing a learn instruction in a depth cascaded content addressable memory system May 10, 1998 Issued
Array ( [id] => 4376350 [patent_doc_number] => 06219748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Method and apparatus for implementing a learn instruction in a content addressable memory device' [patent_app_type] => 1 [patent_app_number] => 9/076337 [patent_app_country] => US [patent_app_date] => 1998-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 12160 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219748.pdf [firstpage_image] =>[orig_patent_app_number] => 076337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/076337
Method and apparatus for implementing a learn instruction in a content addressable memory device May 10, 1998 Issued
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