Than Vinh Nguyen

Array ( [id] => 3647716 [patent_doc_number] => 05611065 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Address prediction for relative-to-absolute addressing' [patent_app_type] => 1 [patent_app_number] => 8/306085 [patent_app_country] => US [patent_app_date] => 1994-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9885 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/611/05611065.pdf [firstpage_image] =>[orig_patent_app_number] => 306085 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3758562 [patent_doc_number] => 05754819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Low-latency memory indexing method and structure' [patent_app_type] => 1 [patent_app_number] => 8/282525 [patent_app_country] => US [patent_app_date] => 1994-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6238 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754819.pdf [firstpage_image] =>[orig_patent_app_number] => 282525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3900987 [patent_doc_number] => 05715418 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Autonomous high speed linear space address mode translation for use with a computer hard disc system' [patent_app_type] => 1 [patent_app_number] => 8/281445 [patent_app_country] => US [patent_app_date] => 1994-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6845 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715418.pdf [firstpage_image] =>[orig_patent_app_number] => 281445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3708534 [patent_doc_number] => 05619670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Address decoder with small circuit scale and address area expansion capability' [patent_app_type] => 1 [patent_app_number] => 8/280531 [patent_app_country] => US [patent_app_date] => 1994-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3534 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619670.pdf [firstpage_image] =>[orig_patent_app_number] => 280531 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3810223 [patent_doc_number] => 05842224 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Method and apparatus for source filtering data packets between networks of differing media' [patent_app_type] => 1 [patent_app_number] => 8/269951 [patent_app_country] => US [patent_app_date] => 1994-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 21192 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/842/05842224.pdf [firstpage_image] =>[orig_patent_app_number] => 269951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3716462 [patent_doc_number] => 05675761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method and system for providing discontiguous drive support' [patent_app_type] => 1 [patent_app_number] => 8/242935 [patent_app_country] => US [patent_app_date] => 1994-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3212 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 637 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675761.pdf [firstpage_image] =>[orig_patent_app_number] => 242935 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3701164 [patent_doc_number] => 05664139 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Method and a computer system for allocating and mapping frame buffers into expanded memory' [patent_app_type] => 1 [patent_app_number] => 8/243364 [patent_app_country] => US [patent_app_date] => 1994-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3522 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/664/05664139.pdf [firstpage_image] =>[orig_patent_app_number] => 243364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3700984 [patent_doc_number] => 05644749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Parallel computer and processor element utilizing less memory' [patent_app_type] => 1 [patent_app_number] => 8/239763 [patent_app_country] => US [patent_app_date] => 1994-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 7633 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 453 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644749.pdf [firstpage_image] =>[orig_patent_app_number] => 239763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3902667 [patent_doc_number] => 05724545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Memory card with capacity-independent 3-line addressing system' [patent_app_type] => 1 [patent_app_number] => 8/211534 [patent_app_country] => US [patent_app_date] => 1994-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1609 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724545.pdf [firstpage_image] =>[orig_patent_app_number] => 211534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3816091 [patent_doc_number] => 05829051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Apparatus and method for intelligent multiple-probe cache allocation' [patent_app_type] => 1 [patent_app_number] => 8/223069 [patent_app_country] => US [patent_app_date] => 1994-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6093 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/829/05829051.pdf [firstpage_image] =>[orig_patent_app_number] => 223069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3705815 [patent_doc_number] => 05651127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Guided transfers with variable stepping' [patent_app_type] => 1 [patent_app_number] => 8/209123 [patent_app_country] => US [patent_app_date] => 1994-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 44 [patent_no_of_words] => 50485 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 430 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/651/05651127.pdf [firstpage_image] =>[orig_patent_app_number] => 209123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4268966 [patent_doc_number] => 06138202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Object space manager circuit for obtaining addresses of object headers' [patent_app_type] => 1 [patent_app_number] => 8/176940 [patent_app_country] => US [patent_app_date] => 1994-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 13011 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/138/06138202.pdf [firstpage_image] =>[orig_patent_app_number] => 176940 [rel_patent_id] =>[rel_patent_doc_number] =>)