
Thanh C. Le
Examiner (ID: 14429, Phone: (571)272-5027 , Office: P/2649 )
| Most Active Art Unit | 2649 |
| Art Unit(s) | 2618, 2749, 2649, 2682, 2646, 2684, 2611, 2745 |
| Total Applications | 1817 |
| Issued Applications | 1560 |
| Pending Applications | 82 |
| Abandoned Applications | 180 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17070845
[patent_doc_number] => 20210273062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => Method for Forming Source/Drain Contacts Utilizing an Inhibitor
[patent_app_type] => utility
[patent_app_number] => 16/881481
[patent_app_country] => US
[patent_app_date] => 2020-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8705
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16881481
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/881481 | Method for forming source/drain contacts utilizing an inhibitor | May 21, 2020 | Issued |
Array
(
[id] => 17122107
[patent_doc_number] => 11133249
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-09-28
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/877088
[patent_app_country] => US
[patent_app_date] => 2020-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 7538
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877088
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/877088 | Semiconductor device | May 17, 2020 | Issued |
Array
(
[id] => 16471662
[patent_doc_number] => 20200373200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => METAL BASED HYDROGEN BARRIER
[patent_app_type] => utility
[patent_app_number] => 16/876293
[patent_app_country] => US
[patent_app_date] => 2020-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4263
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876293
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/876293 | METAL BASED HYDROGEN BARRIER | May 17, 2020 | Abandoned |
Array
(
[id] => 17551731
[patent_doc_number] => 20220123073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-21
[patent_title] => Display Substrate and Preparation Method thereof, and Display Apparatus
[patent_app_type] => utility
[patent_app_number] => 17/270414
[patent_app_country] => US
[patent_app_date] => 2020-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17922
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17270414
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/270414 | Display substrate and preparation method thereof, and display apparatus | May 14, 2020 | Issued |
Array
(
[id] => 18645736
[patent_doc_number] => 11769817
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-26
[patent_title] => Method for forming source/drain contacts
[patent_app_type] => utility
[patent_app_number] => 16/871882
[patent_app_country] => US
[patent_app_date] => 2020-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 7057
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16871882
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/871882 | Method for forming source/drain contacts | May 10, 2020 | Issued |
Array
(
[id] => 16699891
[patent_doc_number] => 10950499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-16
[patent_title] => Integrated circuit devices and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/868811
[patent_app_country] => US
[patent_app_date] => 2020-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 10695
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16868811
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/868811 | Integrated circuit devices and method of manufacturing the same | May 6, 2020 | Issued |
Array
(
[id] => 16272410
[patent_doc_number] => 20200273898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-27
[patent_title] => SOLID STATE IMAGING DEVICE, MANUFACTURING METHOD OF THE SAME, AND ELECTRONIC EQUIPMENT
[patent_app_type] => utility
[patent_app_number] => 16/867141
[patent_app_country] => US
[patent_app_date] => 2020-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867141
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/867141 | Solid state imaging device, manufacturing method of the same, and electronic equipment | May 4, 2020 | Issued |
Array
(
[id] => 16951789
[patent_doc_number] => 20210210481
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-08
[patent_title] => CLAMPING CIRCUIT INTEGRATED ON GALLIUM NITRIDE SEMICONDUCTOR DEVICE AND RELATED SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/860078
[patent_app_country] => US
[patent_app_date] => 2020-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4839
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -32
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16860078
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/860078 | Clamping circuit integrated on gallium nitride semiconductor device and related semiconductor device | Apr 27, 2020 | Issued |
Array
(
[id] => 17353282
[patent_doc_number] => 11227929
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-18
[patent_title] => Metal gate structure
[patent_app_type] => utility
[patent_app_number] => 16/856211
[patent_app_country] => US
[patent_app_date] => 2020-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3092
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856211
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/856211 | Metal gate structure | Apr 22, 2020 | Issued |
Array
(
[id] => 16226299
[patent_doc_number] => 20200251416
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-06
[patent_title] => Device-Manufacturing Scheme for Increasing the Density of Metal Patterns in Inter-Layer Dielectrics
[patent_app_type] => utility
[patent_app_number] => 16/852831
[patent_app_country] => US
[patent_app_date] => 2020-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3765
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852831
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/852831 | Device-manufacturing scheme for increasing the density of metal patterns in inter-layer dielectrics | Apr 19, 2020 | Issued |
Array
(
[id] => 17692440
[patent_doc_number] => 20220199733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => DISPLAY SUBSTRATE AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/263576
[patent_app_country] => US
[patent_app_date] => 2020-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7680
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17263576
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/263576 | Display substrate and display device | Apr 13, 2020 | Issued |
Array
(
[id] => 16210536
[patent_doc_number] => 20200243526
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => VERTICAL FIN FIELD EFFECT TRANSISTOR DEVICES WITH A REPLACEMENT METAL GATE
[patent_app_type] => utility
[patent_app_number] => 16/847350
[patent_app_country] => US
[patent_app_date] => 2020-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8541
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847350
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/847350 | Vertical fin field effect transistor devices with a replacement metal gate | Apr 12, 2020 | Issued |
Array
(
[id] => 16210535
[patent_doc_number] => 20200243525
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => VERTICAL FIN FIELD EFFECT TRANSISTOR DEVICES WITH A REPLACEMENT METAL GATE
[patent_app_type] => utility
[patent_app_number] => 16/847122
[patent_app_country] => US
[patent_app_date] => 2020-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8542
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847122
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/847122 | Vertical fin field effect transistor devices with a replacement metal gate | Apr 12, 2020 | Issued |
Array
(
[id] => 17063204
[patent_doc_number] => 11107814
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-31
[patent_title] => Vertical fin field effect transistor devices with a replacement metal gate
[patent_app_type] => utility
[patent_app_number] => 16/847451
[patent_app_country] => US
[patent_app_date] => 2020-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 8542
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847451
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/847451 | Vertical fin field effect transistor devices with a replacement metal gate | Apr 12, 2020 | Issued |
Array
(
[id] => 17424502
[patent_doc_number] => 11257966
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-22
[patent_title] => Fabricating thin-film optoelectronic devices with added rubidium and/or cesium
[patent_app_type] => utility
[patent_app_number] => 16/845542
[patent_app_country] => US
[patent_app_date] => 2020-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 7300
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845542
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/845542 | Fabricating thin-film optoelectronic devices with added rubidium and/or cesium | Apr 9, 2020 | Issued |
Array
(
[id] => 17847977
[patent_doc_number] => 11437363
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Diode, transistor and display device
[patent_app_type] => utility
[patent_app_number] => 16/845289
[patent_app_country] => US
[patent_app_date] => 2020-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 10831
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845289
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/845289 | Diode, transistor and display device | Apr 9, 2020 | Issued |
Array
(
[id] => 16881270
[patent_doc_number] => 11031427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-08
[patent_title] => Solid-state imaging device, manufacturing method thereof, and electronic apparatus
[patent_app_type] => utility
[patent_app_number] => 16/841384
[patent_app_country] => US
[patent_app_date] => 2020-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 31
[patent_no_of_words] => 17491
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16841384
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/841384 | Solid-state imaging device, manufacturing method thereof, and electronic apparatus | Apr 5, 2020 | Issued |
Array
(
[id] => 17130616
[patent_doc_number] => 20210305385
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => TRENCH WITH DIFFERENT TRANSVERSE CROSS-SECTIONAL WIDTHS
[patent_app_type] => utility
[patent_app_number] => 16/836344
[patent_app_country] => US
[patent_app_date] => 2020-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5202
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836344
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/836344 | Trench with different transverse cross-sectional widths | Mar 30, 2020 | Issued |
Array
(
[id] => 17130386
[patent_doc_number] => 20210305155
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => VIA ZERO INTERCONNECT LAYER METAL RESISTOR INTEGRATION
[patent_app_type] => utility
[patent_app_number] => 16/834618
[patent_app_country] => US
[patent_app_date] => 2020-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6459
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834618
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/834618 | VIA ZERO INTERCONNECT LAYER METAL RESISTOR INTEGRATION | Mar 29, 2020 | Abandoned |
Array
(
[id] => 17130626
[patent_doc_number] => 20210305395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/832945
[patent_app_country] => US
[patent_app_date] => 2020-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4048
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832945
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/832945 | Semiconductor structure and method for manufacturing the same | Mar 26, 2020 | Issued |