Thanh Ha T. Dang

Array ( [id] => 2421933 [patent_doc_number] => 04787058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-22 [patent_title] => 'Synthetic quadrature generating apparatus' [patent_app_type] => 1 [patent_app_number] => 6/776181 [patent_app_country] => US [patent_app_date] => 1985-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2841 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/787/04787058.pdf [firstpage_image] =>[orig_patent_app_number] => 776181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2365066 [patent_doc_number] => 04694455 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Decoding method for multiple bit error correction BCH codes' [patent_app_type] => 1 [patent_app_number] => 6/772504 [patent_app_country] => US [patent_app_date] => 1985-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9225 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694455.pdf [firstpage_image] =>[orig_patent_app_number] => 772504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2302170 [patent_doc_number] => 04697268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-29 [patent_title] => 'Data processing apparatus with message acceptance monitoring' [patent_app_type] => 1 [patent_app_number] => 6/770745 [patent_app_country] => US [patent_app_date] => 1985-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2048 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/697/04697268.pdf [firstpage_image] =>[orig_patent_app_number] => 770745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2361390 [patent_doc_number] => 04688224 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-08-18 [patent_title] => 'Method of and device for correcting burst errors on low bit-rate coded speech signals transmitted on radio-communication channels' [patent_app_type] => 1 [patent_app_number] => 6/766754 [patent_app_country] => US [patent_app_date] => 1985-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6097 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/688/04688224.pdf [firstpage_image] =>[orig_patent_app_number] => 766754 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2422419 [patent_doc_number] => 04719626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-12 [patent_title] => 'Diagnostic method and apparatus for channel control apparatus' [patent_app_type] => 1 [patent_app_number] => 6/767795 [patent_app_country] => US [patent_app_date] => 1985-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4553 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/719/04719626.pdf [firstpage_image] =>[orig_patent_app_number] => 767795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2331639 [patent_doc_number] => 04680760 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-14 [patent_title] => 'Accelerated test apparatus and support logic for a content addressable memory' [patent_app_type] => 1 [patent_app_number] => 6/762656 [patent_app_country] => US [patent_app_date] => 1985-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2854 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/680/04680760.pdf [firstpage_image] =>[orig_patent_app_number] => 762656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2365065 [patent_doc_number] => 04694454 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Dynamic memory diagnosis and error correction apparatus' [patent_app_type] => 1 [patent_app_number] => 6/759954 [patent_app_country] => US [patent_app_date] => 1985-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7929 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694454.pdf [firstpage_image] =>[orig_patent_app_number] => 759954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2333286 [patent_doc_number] => 04698811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-06 [patent_title] => 'Method and apparatus for generating error correction codes for digitized picture signal recording/reproducing' [patent_app_type] => 1 [patent_app_number] => 6/756706 [patent_app_country] => US [patent_app_date] => 1985-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5768 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/698/04698811.pdf [firstpage_image] =>[orig_patent_app_number] => 756706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2328828 [patent_doc_number] => 04670880 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-02 [patent_title] => 'Method of error detection and correction by majority' [patent_app_type] => 1 [patent_app_number] => 6/756425 [patent_app_country] => US [patent_app_date] => 1985-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1985 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/670/04670880.pdf [firstpage_image] =>[orig_patent_app_number] => 756425 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2363563 [patent_doc_number] => 04683568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-28 [patent_title] => 'Method of monitoring computer elements, particularly microprocessors' [patent_app_type] => 1 [patent_app_number] => 6/760734 [patent_app_country] => US [patent_app_date] => 1985-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1044 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/683/04683568.pdf [firstpage_image] =>[orig_patent_app_number] => 760734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2428586 [patent_doc_number] => 04727547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-23 [patent_title] => 'Method and apparatus for decoding' [patent_app_type] => 1 [patent_app_number] => 6/753255 [patent_app_country] => US [patent_app_date] => 1985-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 7943 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/727/04727547.pdf [firstpage_image] =>[orig_patent_app_number] => 753255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2634509 [patent_doc_number] => 04920538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-24 [patent_title] => 'Method of checking the execution of microcode sequences' [patent_app_type] => 1 [patent_app_number] => 6/750346 [patent_app_country] => US [patent_app_date] => 1985-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3003 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/920/04920538.pdf [firstpage_image] =>[orig_patent_app_number] => 750346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2337285 [patent_doc_number] => 04635261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-06 [patent_title] => 'On chip test system for configurable gate arrays' [patent_app_type] => 1 [patent_app_number] => 6/748885 [patent_app_country] => US [patent_app_date] => 1985-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3871 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/635/04635261.pdf [firstpage_image] =>[orig_patent_app_number] => 748885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2456133 [patent_doc_number] => 04723219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-02 [patent_title] => 'Programmed path for automatic tool retraction and return responsive to degradation threshold' [patent_app_type] => 1 [patent_app_number] => 6/747809 [patent_app_country] => US [patent_app_date] => 1985-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 19396 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/723/04723219.pdf [firstpage_image] =>[orig_patent_app_number] => 747809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2358734 [patent_doc_number] => 04714999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-22 [patent_title] => 'Numerical control method' [patent_app_type] => 1 [patent_app_number] => 6/744009 [patent_app_country] => US [patent_app_date] => 1985-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1960 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/714/04714999.pdf [firstpage_image] =>[orig_patent_app_number] => 744009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2363579 [patent_doc_number] => 04683571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-28 [patent_title] => 'Digital signal decoding system' [patent_app_type] => 1 [patent_app_number] => 6/739016 [patent_app_country] => US [patent_app_date] => 1985-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 86 [patent_no_of_words] => 14302 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/683/04683571.pdf [firstpage_image] =>[orig_patent_app_number] => 739016 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2392265 [patent_doc_number] => 04696004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-22 [patent_title] => 'Logic analyzer' [patent_app_type] => 1 [patent_app_number] => 6/737466 [patent_app_country] => US [patent_app_date] => 1985-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4163 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/696/04696004.pdf [firstpage_image] =>[orig_patent_app_number] => 737466 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2328759 [patent_doc_number] => 04670876 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-02 [patent_title] => 'Parity integrity check logic' [patent_app_type] => 1 [patent_app_number] => 6/734295 [patent_app_country] => US [patent_app_date] => 1985-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2913 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 561 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/670/04670876.pdf [firstpage_image] =>[orig_patent_app_number] => 734295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2335778 [patent_doc_number] => 04672610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-09 [patent_title] => 'Built in self test input generator for programmable logic arrays' [patent_app_type] => 1 [patent_app_number] => 6/733545 [patent_app_country] => US [patent_app_date] => 1985-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3228 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/672/04672610.pdf [firstpage_image] =>[orig_patent_app_number] => 733545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2393533 [patent_doc_number] => 04707833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-17 [patent_title] => 'Fault-compensating digital information transfer apparatus' [patent_app_type] => 1 [patent_app_number] => 6/724465 [patent_app_country] => US [patent_app_date] => 1985-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4104 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/707/04707833.pdf [firstpage_image] =>[orig_patent_app_number] => 724465 [rel_patent_id] =>[rel_patent_doc_number] =>)