Search

Thanh Ha T. Dang

Examiner (ID: 17141, Phone: (571)272-4033 , Office: P/2163 )

Most Active Art Unit
2163
Art Unit(s)
2163
Total Applications
708
Issued Applications
595
Pending Applications
12
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2499569 [patent_doc_number] => 04868823 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-19 [patent_title] => 'High speed concurrent testing of dynamic read/write memory array' [patent_app_type] => 1 [patent_app_number] => 7/144299 [patent_app_country] => US [patent_app_date] => 1988-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5987 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/868/04868823.pdf [firstpage_image] =>[orig_patent_app_number] => 144299 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/144299
High speed concurrent testing of dynamic read/write memory array Jan 14, 1988 Issued
Array ( [id] => 2638421 [patent_doc_number] => 04907227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-06 [patent_title] => 'In-line coupling circuit for a closed-loop communication terminal' [patent_app_type] => 1 [patent_app_number] => 7/139625 [patent_app_country] => US [patent_app_date] => 1987-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4346 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/907/04907227.pdf [firstpage_image] =>[orig_patent_app_number] => 139625 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/139625
In-line coupling circuit for a closed-loop communication terminal Dec 29, 1987 Issued
Array ( [id] => 2499589 [patent_doc_number] => 04868824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-19 [patent_title] => 'Measurement of missed start-up rate and missed message rate' [patent_app_type] => 1 [patent_app_number] => 7/137995 [patent_app_country] => US [patent_app_date] => 1987-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6400 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/868/04868824.pdf [firstpage_image] =>[orig_patent_app_number] => 137995 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/137995
Measurement of missed start-up rate and missed message rate Dec 27, 1987 Issued
Array ( [id] => 2484911 [patent_doc_number] => 04872171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-03 [patent_title] => 'Method for recording digital data so as to avoid operational error on reproduction' [patent_app_type] => 1 [patent_app_number] => 7/138124 [patent_app_country] => US [patent_app_date] => 1987-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1941 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/872/04872171.pdf [firstpage_image] =>[orig_patent_app_number] => 138124 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/138124
Method for recording digital data so as to avoid operational error on reproduction Dec 27, 1987 Issued
Array ( [id] => 2482470 [patent_doc_number] => 04887267 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-12 [patent_title] => 'Logic integrated circuit capable of simplifying a test' [patent_app_type] => 1 [patent_app_number] => 7/138804 [patent_app_country] => US [patent_app_date] => 1987-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4776 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/887/04887267.pdf [firstpage_image] =>[orig_patent_app_number] => 138804 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/138804
Logic integrated circuit capable of simplifying a test Dec 27, 1987 Issued
Array ( [id] => 2481535 [patent_doc_number] => 04887220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-12 [patent_title] => 'Parameter initializing method for a programmable machine controller' [patent_app_type] => 1 [patent_app_number] => 7/143859 [patent_app_country] => US [patent_app_date] => 1987-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2035 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/887/04887220.pdf [firstpage_image] =>[orig_patent_app_number] => 143859 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/143859
Parameter initializing method for a programmable machine controller Dec 22, 1987 Issued
Array ( [id] => 2483291 [patent_doc_number] => 04879716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-07 [patent_title] => 'Resilient data communications system' [patent_app_type] => 1 [patent_app_number] => 7/137315 [patent_app_country] => US [patent_app_date] => 1987-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 10 [patent_no_of_words] => 5683 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 534 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/879/04879716.pdf [firstpage_image] =>[orig_patent_app_number] => 137315 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/137315
Resilient data communications system Dec 22, 1987 Issued
07/144342 APPARATUS AND METHOD FOR ENCODING AND DECODING ATTRIBUTE DATA INTO ERROR CHECKING SYMBOLS OF MAIN DATA Dec 10, 1987 Abandoned
Array ( [id] => 2486440 [patent_doc_number] => 04882668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-21 [patent_title] => 'Adaptive matched filter' [patent_app_type] => 1 [patent_app_number] => 7/131065 [patent_app_country] => US [patent_app_date] => 1987-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4124 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/882/04882668.pdf [firstpage_image] =>[orig_patent_app_number] => 131065 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/131065
Adaptive matched filter Dec 9, 1987 Issued
Array ( [id] => 2537841 [patent_doc_number] => 04862380 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-29 [patent_title] => 'Numerical control unit' [patent_app_type] => 1 [patent_app_number] => 7/143129 [patent_app_country] => US [patent_app_date] => 1987-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1913 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/862/04862380.pdf [firstpage_image] =>[orig_patent_app_number] => 143129 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/143129
Numerical control unit Dec 3, 1987 Issued
Array ( [id] => 2619260 [patent_doc_number] => 04903267 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-20 [patent_title] => 'Method of generating test data' [patent_app_type] => 1 [patent_app_number] => 7/126834 [patent_app_country] => US [patent_app_date] => 1987-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3394 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/903/04903267.pdf [firstpage_image] =>[orig_patent_app_number] => 126834 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/126834
Method of generating test data Nov 29, 1987 Issued
Array ( [id] => 2478336 [patent_doc_number] => 04845712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-04 [patent_title] => 'State machine checker' [patent_app_type] => 1 [patent_app_number] => 7/126525 [patent_app_country] => US [patent_app_date] => 1987-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3362 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/845/04845712.pdf [firstpage_image] =>[orig_patent_app_number] => 126525 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/126525
State machine checker Nov 29, 1987 Issued
Array ( [id] => 2482228 [patent_doc_number] => 04879659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-07 [patent_title] => 'Log processing systems' [patent_app_type] => 1 [patent_app_number] => 7/125019 [patent_app_country] => US [patent_app_date] => 1987-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 6679 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/879/04879659.pdf [firstpage_image] =>[orig_patent_app_number] => 125019 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/125019
Log processing systems Nov 23, 1987 Issued
Array ( [id] => 2618471 [patent_doc_number] => 04903226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-20 [patent_title] => 'Switched networks' [patent_app_type] => 1 [patent_app_number] => 7/122059 [patent_app_country] => US [patent_app_date] => 1987-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2506 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/903/04903226.pdf [firstpage_image] =>[orig_patent_app_number] => 122059 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/122059
Switched networks Nov 17, 1987 Issued
Array ( [id] => 2528218 [patent_doc_number] => 04870643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-26 [patent_title] => 'Parallel drive array storage system' [patent_app_type] => 1 [patent_app_number] => 7/118785 [patent_app_country] => US [patent_app_date] => 1987-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 14707 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/870/04870643.pdf [firstpage_image] =>[orig_patent_app_number] => 118785 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/118785
Parallel drive array storage system Nov 5, 1987 Issued
Array ( [id] => 2778375 [patent_doc_number] => 04985824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-15 [patent_title] => 'Reliable fuzzy fault tolerant controller' [patent_app_type] => 1 [patent_app_number] => 7/114988 [patent_app_country] => US [patent_app_date] => 1987-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 3352 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/985/04985824.pdf [firstpage_image] =>[orig_patent_app_number] => 114988 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/114988
Reliable fuzzy fault tolerant controller Oct 29, 1987 Issued
Array ( [id] => 2531546 [patent_doc_number] => 04881228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-14 [patent_title] => 'Debugging microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/114285 [patent_app_country] => US [patent_app_date] => 1987-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3553 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/881/04881228.pdf [firstpage_image] =>[orig_patent_app_number] => 114285 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/114285
Debugging microprocessor Oct 28, 1987 Issued
Array ( [id] => 2646095 [patent_doc_number] => 04914564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-03 [patent_title] => 'Adaptive control system of high accuracy and low corrective energy consumption' [patent_app_type] => 1 [patent_app_number] => 7/126939 [patent_app_country] => US [patent_app_date] => 1987-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6507 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/914/04914564.pdf [firstpage_image] =>[orig_patent_app_number] => 126939 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/126939
Adaptive control system of high accuracy and low corrective energy consumption Oct 27, 1987 Issued
Array ( [id] => 2501509 [patent_doc_number] => 04860288 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-22 [patent_title] => 'Clock monitor for use with VLSI chips' [patent_app_type] => 1 [patent_app_number] => 7/112916 [patent_app_country] => US [patent_app_date] => 1987-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6849 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/860/04860288.pdf [firstpage_image] =>[orig_patent_app_number] => 112916 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/112916
Clock monitor for use with VLSI chips Oct 22, 1987 Issued
Array ( [id] => 2499981 [patent_doc_number] => 04829525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-09 [patent_title] => 'PCM signal reproducing apparatus including error/erasure correction circuit' [patent_app_type] => 1 [patent_app_number] => 7/112035 [patent_app_country] => US [patent_app_date] => 1987-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 15661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/829/04829525.pdf [firstpage_image] =>[orig_patent_app_number] => 112035 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/112035
PCM signal reproducing apparatus including error/erasure correction circuit Oct 22, 1987 Issued
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