Search

Thanh Ha T. Dang

Examiner (ID: 17141, Phone: (571)272-4033 , Office: P/2163 )

Most Active Art Unit
2163
Art Unit(s)
2163
Total Applications
708
Issued Applications
595
Pending Applications
12
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2491823 [patent_doc_number] => 04823345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-18 [patent_title] => 'Method and apparatus for communication network alert record identification' [patent_app_type] => 1 [patent_app_number] => 7/062915 [patent_app_country] => US [patent_app_date] => 1987-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 7140 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/823/04823345.pdf [firstpage_image] =>[orig_patent_app_number] => 062915 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/062915
Method and apparatus for communication network alert record identification Jun 14, 1987 Issued
Array ( [id] => 2529333 [patent_doc_number] => 04856002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-08 [patent_title] => 'Semiconductor integrated circuit apparatus' [patent_app_type] => 1 [patent_app_number] => 7/062439 [patent_app_country] => US [patent_app_date] => 1987-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 3664 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/856/04856002.pdf [firstpage_image] =>[orig_patent_app_number] => 062439 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/062439
Semiconductor integrated circuit apparatus Jun 11, 1987 Issued
Array ( [id] => 2478376 [patent_doc_number] => 04845714 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-04 [patent_title] => 'Multiple pass error correction process and apparatus for product codes' [patent_app_type] => 1 [patent_app_number] => 7/059454 [patent_app_country] => US [patent_app_date] => 1987-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8406 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/845/04845714.pdf [firstpage_image] =>[orig_patent_app_number] => 059454 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/059454
Multiple pass error correction process and apparatus for product codes Jun 7, 1987 Issued
Array ( [id] => 2525309 [patent_doc_number] => 04852093 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Method for simulating a fault in a logic circuit and a simulation model for the implementation of the method' [patent_app_type] => 1 [patent_app_number] => 7/056896 [patent_app_country] => US [patent_app_date] => 1987-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3890 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/852/04852093.pdf [firstpage_image] =>[orig_patent_app_number] => 056896 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/056896
Method for simulating a fault in a logic circuit and a simulation model for the implementation of the method Jun 2, 1987 Issued
Array ( [id] => 2499607 [patent_doc_number] => 04868825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-19 [patent_title] => 'Method for simulating an open fault in a logic circuit comprising field effect transistors and simulation models for implementing the method' [patent_app_type] => 1 [patent_app_number] => 7/056894 [patent_app_country] => US [patent_app_date] => 1987-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4573 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/868/04868825.pdf [firstpage_image] =>[orig_patent_app_number] => 056894 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/056894
Method for simulating an open fault in a logic circuit comprising field effect transistors and simulation models for implementing the method Jun 2, 1987 Issued
Array ( [id] => 2562879 [patent_doc_number] => 04807230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-02-21 [patent_title] => 'Frame synchronization' [patent_app_type] => 1 [patent_app_number] => 7/055805 [patent_app_country] => US [patent_app_date] => 1987-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 13451 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/807/04807230.pdf [firstpage_image] =>[orig_patent_app_number] => 055805 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/055805
Frame synchronization May 28, 1987 Issued
07/054109 APPARATUS FOR SELF-TESTING A DIGITAL LOGIC CIRCUIT May 19, 1987 Issued
07/050725 REAL-TIME BCH ERROR CORRECTION CODE DECODING MECHANISM May 14, 1987 Abandoned
Array ( [id] => 2433271 [patent_doc_number] => 04763330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-09 [patent_title] => 'Syndrome calculating apparatus' [patent_app_type] => 1 [patent_app_number] => 7/044916 [patent_app_country] => US [patent_app_date] => 1987-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7887 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/763/04763330.pdf [firstpage_image] =>[orig_patent_app_number] => 044916 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/044916
Syndrome calculating apparatus Apr 30, 1987 Issued
Array ( [id] => 2502633 [patent_doc_number] => 04825440 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-25 [patent_title] => 'Signal error concealment circuit and method' [patent_app_type] => 1 [patent_app_number] => 7/045692 [patent_app_country] => US [patent_app_date] => 1987-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3443 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/825/04825440.pdf [firstpage_image] =>[orig_patent_app_number] => 045692 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/045692
Signal error concealment circuit and method Apr 29, 1987 Issued
Array ( [id] => 2575365 [patent_doc_number] => 04858236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-15 [patent_title] => 'Method for error correction in memory system' [patent_app_type] => 1 [patent_app_number] => 7/041785 [patent_app_country] => US [patent_app_date] => 1987-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 1964 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/858/04858236.pdf [firstpage_image] =>[orig_patent_app_number] => 041785 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/041785
Method for error correction in memory system Apr 22, 1987 Issued
Array ( [id] => 2557106 [patent_doc_number] => 04811233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-07 [patent_title] => 'Cost-optimal state feedback controller for all-attitude gimbal system' [patent_app_type] => 1 [patent_app_number] => 7/036225 [patent_app_country] => US [patent_app_date] => 1987-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4222 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/811/04811233.pdf [firstpage_image] =>[orig_patent_app_number] => 036225 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/036225
Cost-optimal state feedback controller for all-attitude gimbal system Apr 1, 1987 Issued
Array ( [id] => 2570756 [patent_doc_number] => 04837764 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-06 [patent_title] => 'Programmable apparatus and method for testing computer peripherals' [patent_app_type] => 1 [patent_app_number] => 7/031534 [patent_app_country] => US [patent_app_date] => 1987-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5665 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/837/04837764.pdf [firstpage_image] =>[orig_patent_app_number] => 031534 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/031534
Programmable apparatus and method for testing computer peripherals Mar 25, 1987 Issued
Array ( [id] => 2570792 [patent_doc_number] => 04837766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-06 [patent_title] => 'Frame step-out detecting system' [patent_app_type] => 1 [patent_app_number] => 7/029556 [patent_app_country] => US [patent_app_date] => 1987-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2724 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/837/04837766.pdf [firstpage_image] =>[orig_patent_app_number] => 029556 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/029556
Frame step-out detecting system Mar 23, 1987 Issued
Array ( [id] => 2499883 [patent_doc_number] => 04829520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-09 [patent_title] => 'In-place diagnosable electronic circuit board' [patent_app_type] => 1 [patent_app_number] => 7/026054 [patent_app_country] => US [patent_app_date] => 1987-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2471 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/829/04829520.pdf [firstpage_image] =>[orig_patent_app_number] => 026054 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/026054
In-place diagnosable electronic circuit board Mar 15, 1987 Issued
07/021814 HIGH SPEED CONCURRENT TESTING OF DYNAMIC READ/WRITE MEMORY ARRAY Mar 3, 1987 Abandoned
Array ( [id] => 2562897 [patent_doc_number] => 04807231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-02-21 [patent_title] => 'Multiplex communication method' [patent_app_type] => 1 [patent_app_number] => 7/021345 [patent_app_country] => US [patent_app_date] => 1987-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 5030 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/807/04807231.pdf [firstpage_image] =>[orig_patent_app_number] => 021345 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/021345
Multiplex communication method Mar 2, 1987 Issued
07/019685 DATA PROCESSING APPARATUS FOR A CAMERA Feb 26, 1987 Abandoned
Array ( [id] => 2486517 [patent_doc_number] => 04813043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-14 [patent_title] => 'Semiconductor test device' [patent_app_type] => 1 [patent_app_number] => 7/017079 [patent_app_country] => US [patent_app_date] => 1987-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1404 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/813/04813043.pdf [firstpage_image] =>[orig_patent_app_number] => 017079 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/017079
Semiconductor test device Feb 19, 1987 Issued
Array ( [id] => 2511570 [patent_doc_number] => 04799220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-17 [patent_title] => 'Dynamic system for testing an equipment' [patent_app_type] => 1 [patent_app_number] => 7/016685 [patent_app_country] => US [patent_app_date] => 1987-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2902 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/799/04799220.pdf [firstpage_image] =>[orig_patent_app_number] => 016685 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/016685
Dynamic system for testing an equipment Feb 18, 1987 Issued
Menu