Search

Thanh V. Pham

Examiner (ID: 11350)

Most Active Art Unit
2823
Art Unit(s)
2899, 2894, 2823
Total Applications
1200
Issued Applications
1001
Pending Applications
5
Abandoned Applications
195

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12005595 [patent_doc_number] => 20170309751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/648914 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 23656 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15648914 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/648914
Method of forming semiconductor device with different energy gap oxide semiconductor stacked layers Jul 12, 2017 Issued
Array ( [id] => 11945931 [patent_doc_number] => 20170250082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/592604 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9158 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15592604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/592604
Silicon carbide semiconductor device and method of manufacturing the same May 10, 2017 Issued
Array ( [id] => 11990302 [patent_doc_number] => 20170294457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'TRANSISTOR AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/498940 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17445 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15498940 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/498940
Transistor and display device Apr 26, 2017 Issued
Array ( [id] => 11760499 [patent_doc_number] => 20170207368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'LIGHT-EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 15/474476 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4324 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474476 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/474476
Light-emitting device Mar 29, 2017 Issued
Array ( [id] => 12175163 [patent_doc_number] => 09893311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'OLED display panel packaging with hydrophobic barricade corresponding to package cover enclosing OLED device and support enclosing hydrophobic barricade' [patent_app_type] => utility [patent_app_number] => 15/448459 [patent_app_country] => US [patent_app_date] => 2017-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3810 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15448459 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/448459
OLED display panel packaging with hydrophobic barricade corresponding to package cover enclosing OLED device and support enclosing hydrophobic barricade Mar 1, 2017 Issued
Array ( [id] => 11613985 [patent_doc_number] => 09651840 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-16 [patent_title] => 'Array substrate and method of repairing broken lines therefor' [patent_app_type] => utility [patent_app_number] => 15/438769 [patent_app_country] => US [patent_app_date] => 2017-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2573 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438769 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438769
Array substrate and method of repairing broken lines therefor Feb 21, 2017 Issued
Array ( [id] => 12147676 [patent_doc_number] => 09881937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Preventing strained fin relaxation' [patent_app_type] => utility [patent_app_number] => 15/397170 [patent_app_country] => US [patent_app_date] => 2017-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6239 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15397170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/397170
Preventing strained fin relaxation Jan 2, 2017 Issued
Array ( [id] => 11571721 [patent_doc_number] => 20170110365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/391489 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3578 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391489 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/391489
Nonvolatile memory device and method for fabricating the same Dec 26, 2016 Issued
Array ( [id] => 12019784 [patent_doc_number] => 09812496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Magnetoresistive sensor module and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 15/391111 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 9364 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391111 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/391111
Magnetoresistive sensor module and method for manufacturing the same Dec 26, 2016 Issued
Array ( [id] => 11460077 [patent_doc_number] => 20170053983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'Vertical Gate-All-Around Field Effect Transistors' [patent_app_type] => utility [patent_app_number] => 15/341694 [patent_app_country] => US [patent_app_date] => 2016-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 11450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15341694 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/341694
Vertical gate-all-around field effect transistors Nov 1, 2016 Issued
Array ( [id] => 12195698 [patent_doc_number] => 09899436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-20 [patent_title] => 'Image sensor and related fabrication method' [patent_app_type] => utility [patent_app_number] => 15/334309 [patent_app_country] => US [patent_app_date] => 2016-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6927 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15334309 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/334309
Image sensor and related fabrication method Oct 25, 2016 Issued
Array ( [id] => 11425083 [patent_doc_number] => 20170033229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/290442 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 23661 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/290442
Method of forming semiconductor device including oxide semiconductor stack with different ratio of indium and gallium Oct 10, 2016 Issued
Array ( [id] => 11405054 [patent_doc_number] => 20170025592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'LIGHT EMITTING STRUCTURE AND A MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/285678 [patent_app_country] => US [patent_app_date] => 2016-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15285678 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/285678
Light emitting structure and a manufacturing method thereof Oct 4, 2016 Issued
Array ( [id] => 11811596 [patent_doc_number] => 09716170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-25 [patent_title] => 'Reduced capacitance in vertical transistors by preventing excessive overlap between the gate and the source/drain' [patent_app_type] => utility [patent_app_number] => 15/282398 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5772 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15282398 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/282398
Reduced capacitance in vertical transistors by preventing excessive overlap between the gate and the source/drain Sep 29, 2016 Issued
Array ( [id] => 11502759 [patent_doc_number] => 20170076944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'METHOD FOR CAUSING TENSILE STRAIN IN A SEMICONDUCTOR FILM' [patent_app_type] => utility [patent_app_number] => 15/260767 [patent_app_country] => US [patent_app_date] => 2016-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4662 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15260767 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/260767
Method for causing tensile strain in a semiconductor film Sep 8, 2016 Issued
Array ( [id] => 11904268 [patent_doc_number] => 09773708 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-26 [patent_title] => 'Devices and methods of forming VFET with self-aligned replacement metal gates aligned to top spacer post top source drain EPI' [patent_app_type] => utility [patent_app_number] => 15/245634 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4018 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245634 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245634
Devices and methods of forming VFET with self-aligned replacement metal gates aligned to top spacer post top source drain EPI Aug 23, 2016 Issued
Array ( [id] => 11517549 [patent_doc_number] => 20170084624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'THREE-DIMENSIONAL SEMICONDUCTOR DEVICE WITH VERTICAL AND HORIZONTAL CHANNELS IN STACK STRUCTURE HAVING ELECTRODES VERTICALLY STACKED ON THE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/245218 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 20841 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245218 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245218
Three-dimensional semiconductor device with vertical and horizontal channels in stack structure having electrodes vertically stacked on the substrate Aug 23, 2016 Issued
Array ( [id] => 12953719 [patent_doc_number] => 09837384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Fan-out multi-chip package with plurality of chips stacked in staggered stack arrangement [patent_app_type] => utility [patent_app_number] => 15/245653 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3206 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245653 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245653
Fan-out multi-chip package with plurality of chips stacked in staggered stack arrangement Aug 23, 2016 Issued
Array ( [id] => 12195570 [patent_doc_number] => 09899307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Fan-out chip package with dummy pattern and its fabricating method' [patent_app_type] => utility [patent_app_number] => 15/245605 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 3669 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245605 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245605
Fan-out chip package with dummy pattern and its fabricating method Aug 23, 2016 Issued
Array ( [id] => 12214939 [patent_doc_number] => 09911756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Semiconductor device including transistor and electronic device surrounded by layer having assigned band gap to prevent electrostatic discharge damage' [patent_app_type] => utility [patent_app_number] => 15/245310 [patent_app_country] => US [patent_app_date] => 2016-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 95 [patent_no_of_words] => 34065 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15245310 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/245310
Semiconductor device including transistor and electronic device surrounded by layer having assigned band gap to prevent electrostatic discharge damage Aug 23, 2016 Issued
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