Search

Thanh X. Luu

Examiner (ID: 12280, Phone: (571)272-2441 , Office: P/2878 )

Most Active Art Unit
2878
Art Unit(s)
2878
Total Applications
2382
Issued Applications
1829
Pending Applications
133
Abandoned Applications
447

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19533923 [patent_doc_number] => 20240357825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM [patent_app_type] => utility [patent_app_number] => 18/760980 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760980
Semiconductor device and electronic system Jun 30, 2024 Issued
Array ( [id] => 19531841 [patent_doc_number] => 20240355743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/760442 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760442
Semiconductor storage device with overlapping contacts and surrounding insulating layer Jun 30, 2024 Issued
Array ( [id] => 20507794 [patent_doc_number] => 12542076 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Display apparatus and method of fabricating display apparatus [patent_app_type] => utility [patent_app_number] => 18/679722 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 5220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679722 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679722
Display apparatus and method of fabricating display apparatus May 30, 2024 Issued
Array ( [id] => 19760336 [patent_doc_number] => 20250048901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/664322 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664322 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664322
DISPLAY DEVICE May 14, 2024 Pending
Array ( [id] => 19420952 [patent_doc_number] => 20240297076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SELF-ALIGNED INTERCONNECT WITH PROTECTION LAYER [patent_app_type] => utility [patent_app_number] => 18/657243 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657243 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657243
Self-aligned interconnect with protection layer May 6, 2024 Issued
Array ( [id] => 19853039 [patent_doc_number] => 20250098390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => PANEL FOR ELECTRONIC DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/653130 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653130
PANEL FOR ELECTRONIC DEVICE AND ELECTRONIC DEVICE May 1, 2024 Pending
Array ( [id] => 19384616 [patent_doc_number] => 20240274486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/644109 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644109 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644109
Electronic device including detection element and insulation layer recess structure Apr 23, 2024 Issued
Array ( [id] => 19351516 [patent_doc_number] => 20240260480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => LOW-RESISTANCE CONTACT TO TOP ELECTRODES FOR MEMORY CELLS AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/631094 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631094 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631094
LOW-RESISTANCE CONTACT TO TOP ELECTRODES FOR MEMORY CELLS AND METHODS FOR FORMING THE SAME Apr 9, 2024 Pending
Array ( [id] => 19688109 [patent_doc_number] => 20250006654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SEMICONDUCTOR DEVICE HAVING TEST PATTERN [patent_app_type] => utility [patent_app_number] => 18/630178 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7532 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630178 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/630178
SEMICONDUCTOR DEVICE HAVING TEST PATTERN Apr 8, 2024 Pending
Array ( [id] => 19806080 [patent_doc_number] => 20250072005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/629542 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629542
SEMICONDUCTOR DEVICE Apr 7, 2024 Pending
Array ( [id] => 20283896 [patent_doc_number] => 20250309138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => PROTECTIVE DIELECTRIC LAYER CRACK MITIGATION THROUGH STRESS SINGULARITY FIELD REDUCTION [patent_app_type] => utility [patent_app_number] => 18/621819 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621819
PROTECTIVE DIELECTRIC LAYER CRACK MITIGATION THROUGH STRESS SINGULARITY FIELD REDUCTION Mar 28, 2024 Pending
Array ( [id] => 19305720 [patent_doc_number] => 20240234300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/615681 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615681 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615681
Semiconductor device with dual slit structures and offset contact plug for enhanced vertical connectivity Mar 24, 2024 Issued
Array ( [id] => 19573281 [patent_doc_number] => 20240377573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => Edgeless LED Display System [patent_app_type] => utility [patent_app_number] => 18/614498 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614498 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614498
Edgeless LED Display System Mar 21, 2024 Pending
Array ( [id] => 20124469 [patent_doc_number] => 20250239500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => LAMINATION STRUCTURE MANUFACTURED BY LASER PATTERNING [patent_app_type] => utility [patent_app_number] => 18/614326 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614326
LAMINATION STRUCTURE MANUFACTURED BY LASER PATTERNING Mar 21, 2024 Pending
Array ( [id] => 19453017 [patent_doc_number] => 20240313147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => LIGHT EMITTING ELEMENT AND PRODUCTION METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/605397 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605397 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/605397
LIGHT EMITTING ELEMENT AND PRODUCTION METHOD THEREFOR Mar 13, 2024 Pending
Array ( [id] => 19468216 [patent_doc_number] => 20240321886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => STACKED INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 18/605400 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605400 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/605400
STACKED INTEGRATED CIRCUIT DEVICES Mar 13, 2024 Pending
Array ( [id] => 20734807 [patent_doc_number] => 12642075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Manufacturing method of semiconductor device with dual slit and contact plug structure [patent_app_type] => utility [patent_app_number] => 18/598129 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 45 [patent_no_of_words] => 6905 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598129 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/598129
Manufacturing method of semiconductor device with dual slit and contact plug structure Mar 6, 2024 Issued
Array ( [id] => 19255180 [patent_doc_number] => 20240206177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/591076 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591076 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591076
Semiconductor device with variable gate-to-channel spacing Feb 28, 2024 Issued
Array ( [id] => 19646610 [patent_doc_number] => 20240421130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/585945 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585945 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585945
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE Feb 22, 2024 Pending
Array ( [id] => 19407287 [patent_doc_number] => 20240290798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => MOTHER SUBSTRATE FOR DISPLAY PANEL AND METHOD OF MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/586057 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18586057 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/586057
MOTHER SUBSTRATE FOR DISPLAY PANEL AND METHOD OF MANUFACTURING DISPLAY DEVICE Feb 22, 2024 Pending
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