Search

Thanh Y. Tran

Examiner (ID: 18218)

Most Active Art Unit
2817
Art Unit(s)
2822, 2827, 2892, 2817, 2841, 2829
Total Applications
1625
Issued Applications
1324
Pending Applications
127
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18148310 [patent_doc_number] => 20230022167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => INTEGRATED CIRCUIT ASSEMBLIES WITH STACKED COMPUTE LOGIC AND MEMORY DIES [patent_app_type] => utility [patent_app_number] => 17/382575 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382575
Integrated circuit assemblies with stacked compute logic and memory dies Jul 21, 2021 Issued
Array ( [id] => 18148310 [patent_doc_number] => 20230022167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => INTEGRATED CIRCUIT ASSEMBLIES WITH STACKED COMPUTE LOGIC AND MEMORY DIES [patent_app_type] => utility [patent_app_number] => 17/382575 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382575
Integrated circuit assemblies with stacked compute logic and memory dies Jul 21, 2021 Issued
Array ( [id] => 18148310 [patent_doc_number] => 20230022167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => INTEGRATED CIRCUIT ASSEMBLIES WITH STACKED COMPUTE LOGIC AND MEMORY DIES [patent_app_type] => utility [patent_app_number] => 17/382575 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382575
Integrated circuit assemblies with stacked compute logic and memory dies Jul 21, 2021 Issued
Array ( [id] => 17615474 [patent_doc_number] => 20220157754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MEMORY DEVICE INCLUDING MEMORY CHIP AND PERIPHERAL MEMORY CHIP AND METHOD OF MANUFACTURING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/381782 [patent_app_country] => US [patent_app_date] => 2021-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381782 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/381782
Memory device including memory chip and peripheral memory chip and method of manufacturing the memory device Jul 20, 2021 Issued
Array ( [id] => 17486193 [patent_doc_number] => 20220093697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/380991 [patent_app_country] => US [patent_app_date] => 2021-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17380991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/380991
Display apparatus Jul 19, 2021 Issued
Array ( [id] => 18562964 [patent_doc_number] => 11728217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Wafer level package structure and method of forming same [patent_app_type] => utility [patent_app_number] => 17/379775 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379775 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379775
Wafer level package structure and method of forming same Jul 18, 2021 Issued
Array ( [id] => 17203580 [patent_doc_number] => 20210343675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/378798 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378798 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378798
Package structure and method of manufacturing the same Jul 18, 2021 Issued
Array ( [id] => 18145477 [patent_doc_number] => 20230019333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => PACKAGE COMPRISING STACKED INTEGRATED DEVICES WITH OVERHANG [patent_app_type] => utility [patent_app_number] => 17/375931 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375931
Package comprising stacked integrated devices with overhang Jul 13, 2021 Issued
Array ( [id] => 17203565 [patent_doc_number] => 20210343660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/375926 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375926
Semiconductor package Jul 13, 2021 Issued
Array ( [id] => 18125459 [patent_doc_number] => 20230011076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => Integrated Assemblies and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 17/372891 [patent_app_country] => US [patent_app_date] => 2021-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7305 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/372891
Integrated assemblies and methods of forming integrated assemblies Jul 11, 2021 Issued
Array ( [id] => 18670013 [patent_doc_number] => 11776925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Methods of forming microelectronic devices, and related microelectronic devices and electronic systems [patent_app_type] => utility [patent_app_number] => 17/364429 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 48 [patent_no_of_words] => 24795 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364429 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364429
Methods of forming microelectronic devices, and related microelectronic devices and electronic systems Jun 29, 2021 Issued
Array ( [id] => 19199128 [patent_doc_number] => 11996377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Microelectronic devices and electronic systems [patent_app_type] => utility [patent_app_number] => 17/364335 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 40 [patent_no_of_words] => 22705 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364335
Microelectronic devices and electronic systems Jun 29, 2021 Issued
Array ( [id] => 18874767 [patent_doc_number] => 11862590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Integrated circuit package and method of forming thereof [patent_app_type] => utility [patent_app_number] => 17/361924 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 24091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361924 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361924
Integrated circuit package and method of forming thereof Jun 28, 2021 Issued
Array ( [id] => 17174093 [patent_doc_number] => 20210327764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => Method for FinFET Fabrication and Structure Thereof [patent_app_type] => utility [patent_app_number] => 17/362025 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362025
Method for FinFET fabrication and structure thereof Jun 28, 2021 Issued
Array ( [id] => 17159101 [patent_doc_number] => 20210320152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => ORGANIC LIGHT-EMITTING DIODE DISPLAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/353372 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353372 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353372
Organic light-emitting diode display substrate and display device Jun 20, 2021 Issued
Array ( [id] => 18562977 [patent_doc_number] => 11728230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Semiconductor package and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/350329 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 7480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350329
Semiconductor package and method of fabricating the same Jun 16, 2021 Issued
Array ( [id] => 18304461 [patent_doc_number] => 11626375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/304057 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 10114 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17304057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/304057
Semiconductor memory device Jun 13, 2021 Issued
Array ( [id] => 17752771 [patent_doc_number] => 20220230976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => MEMORY DEVICES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/344946 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344946
Memory devices and methods of forming the same Jun 10, 2021 Issued
Array ( [id] => 18759861 [patent_doc_number] => 11810901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Microelectronic devices, related memory devices and electronic systems, and methods of forming microelectronic devices [patent_app_type] => utility [patent_app_number] => 17/344444 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13234 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344444
Microelectronic devices, related memory devices and electronic systems, and methods of forming microelectronic devices Jun 9, 2021 Issued
Array ( [id] => 18061790 [patent_doc_number] => 20220392877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => COMBINED SEMICONDUCTOR DEVICE PACKAGING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/339409 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339409 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/339409
Combined semiconductor device packaging system Jun 3, 2021 Issued
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