Search

Thanh Y. Tran

Examiner (ID: 15212, Phone: (571)272-2110 , Office: P/2817 )

Most Active Art Unit
2817
Art Unit(s)
2822, 2841, 2817, 2827, 2829, 2892
Total Applications
1640
Issued Applications
1343
Pending Applications
119
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14268083 [patent_doc_number] => 10283614 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-07 [patent_title] => Semiconductor structure including high electron mobility transistor device [patent_app_type] => utility [patent_app_number] => 15/886724 [patent_app_country] => US [patent_app_date] => 2018-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2768 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886724 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/886724
Semiconductor structure including high electron mobility transistor device Jan 31, 2018 Issued
Array ( [id] => 16132983 [patent_doc_number] => 10700263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Annealed seed layer for magnetic random access memory [patent_app_type] => utility [patent_app_number] => 15/886232 [patent_app_country] => US [patent_app_date] => 2018-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3138 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886232 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/886232
Annealed seed layer for magnetic random access memory Jan 31, 2018 Issued
Array ( [id] => 14151845 [patent_doc_number] => 10256312 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-09 [patent_title] => Semiconductor structure with a gap between conductor features and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 15/886812 [patent_app_country] => US [patent_app_date] => 2018-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2763 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15886812 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/886812
Semiconductor structure with a gap between conductor features and fabrication method thereof Jan 31, 2018 Issued
Array ( [id] => 13862539 [patent_doc_number] => 10192997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Semiconductor device comprising oxide semiconductor [patent_app_type] => utility [patent_app_number] => 15/879784 [patent_app_country] => US [patent_app_date] => 2018-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 31 [patent_no_of_words] => 19461 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15879784 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/879784
Semiconductor device comprising oxide semiconductor Jan 24, 2018 Issued
Array ( [id] => 12759757 [patent_doc_number] => 20180145087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/876592 [patent_app_country] => US [patent_app_date] => 2018-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15876592 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/876592
Manufacturing method for semiconductor device having hole penetrating stack structure Jan 21, 2018 Issued
Array ( [id] => 14631281 [patent_doc_number] => 20190229010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => FINFET DEVICES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 15/874889 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874889 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874889
FinFET devices and methods of forming the same Jan 18, 2018 Issued
Array ( [id] => 16536601 [patent_doc_number] => 10879214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Die stack structure and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 15/874899 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 36 [patent_no_of_words] => 9737 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874899 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874899
Die stack structure and method of fabricating the same Jan 18, 2018 Issued
Array ( [id] => 14631625 [patent_doc_number] => 20190229183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => SELF-ALIGNED SINGLE DIFFUSION BREAK ISOLATION WITH REDUCTION OF STRAIN LOSS [patent_app_type] => utility [patent_app_number] => 15/875132 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875132
Self-aligned single diffusion break isolation with reduction of strain loss Jan 18, 2018 Issued
Array ( [id] => 15984797 [patent_doc_number] => 10672737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Three-dimensional integrated circuit structure and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/874893 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874893 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874893
Three-dimensional integrated circuit structure and method of manufacturing the same Jan 18, 2018 Issued
Array ( [id] => 13330531 [patent_doc_number] => 20180216803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => MOUNTING SUBSTRATE, LIGHT-EMITTING APPARATUS, AND ILLUMINATION APPARATUS [patent_app_type] => utility [patent_app_number] => 15/875316 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875316 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875316
Mounting substrate, light-emitting apparatus, and illumination apparatus Jan 18, 2018 Issued
Array ( [id] => 14631353 [patent_doc_number] => 20190229046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => Heterogeneous Fan-Out Structure and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 15/875124 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875124 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875124
Heterogeneous fan-out structure and method of manufacture Jan 18, 2018 Issued
Array ( [id] => 14285121 [patent_doc_number] => 20190139845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/874890 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874890 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874890
Semiconductor package and method of fabricating the same Jan 18, 2018 Issued
Array ( [id] => 13321173 [patent_doc_number] => 20180212124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => LIGHT EMITTING DEVICE MOUNTING BOARD BLOCK, LIGHT EMITTING DEVICE, AND METHOD OF PRODUCING THE LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 15/875346 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875346
Light emitting device mounting board block, light emitting device, and method of producing the light emitting device Jan 18, 2018 Issued
Array ( [id] => 14631693 [patent_doc_number] => 20190229218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-25 [patent_title] => NANOSHEET CHANNEL POST REPLACEMENT GATE PROCESS [patent_app_type] => utility [patent_app_number] => 15/874965 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15874965 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/874965
Nanosheet channel post replacement gate process Jan 18, 2018 Issued
Array ( [id] => 14453955 [patent_doc_number] => 10322929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Monolithic integration of PMUT on CMOS [patent_app_type] => utility [patent_app_number] => 15/875208 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2335 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875208 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875208
Monolithic integration of PMUT on CMOS Jan 18, 2018 Issued
Array ( [id] => 12738766 [patent_doc_number] => 20180138089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => Wafer Level Package Structure and Method of Forming Same [patent_app_type] => utility [patent_app_number] => 15/871604 [patent_app_country] => US [patent_app_date] => 2018-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/871604
Wafer level package structure and method of forming same Jan 14, 2018 Issued
Array ( [id] => 14459973 [patent_doc_number] => 10325960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Organic light emitting device [patent_app_type] => utility [patent_app_number] => 15/870389 [patent_app_country] => US [patent_app_date] => 2018-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10341 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15870389 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/870389
Organic light emitting device Jan 11, 2018 Issued
Array ( [id] => 16356502 [patent_doc_number] => 10797020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor device assemblies including multiple stacks of different semiconductor dies [patent_app_type] => utility [patent_app_number] => 15/858641 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2976 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858641 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858641
Semiconductor device assemblies including multiple stacks of different semiconductor dies Dec 28, 2017 Issued
Array ( [id] => 14542301 [patent_doc_number] => 20190206772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MULTI-DIE INTEGRATED CIRCUIT PACKAGES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/858948 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858948 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858948
Multi-die integrated circuit packages and methods of manufacturing the same Dec 28, 2017 Issued
Array ( [id] => 14542293 [patent_doc_number] => 20190206768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => INTEGRATED CIRCUIT PACKAGES WITH WETTABLE FLANKS AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/858962 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858962 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858962
Integrated circuit packages with wettable flanks and methods of manufacturing the same Dec 28, 2017 Issued
Menu