Search

Thanhha S. Pham

Examiner (ID: 14207, Phone: (571)272-1696 , Office: P/2819 )

Most Active Art Unit
2819
Art Unit(s)
2812, 2894, 2813, 2819
Total Applications
1792
Issued Applications
1469
Pending Applications
110
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19546438 [patent_doc_number] => 20240363474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DIE PACKAGE WITH THERMAL MANAGEMENT FEATURES [patent_app_type] => utility [patent_app_number] => 18/765021 [patent_app_country] => US [patent_app_date] => 2024-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18765021 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/765021
METHOD FOR FORMING SEMICONDUCTOR DIE PACKAGE WITH THERMAL MANAGEMENT FEATURES Jul 4, 2024 Pending
Array ( [id] => 19531772 [patent_doc_number] => 20240355674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH PROTECTION LINER FOR BIT LINE [patent_app_type] => utility [patent_app_number] => 18/763006 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763006 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763006
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH PROTECTION LINER FOR BIT LINE Jul 2, 2024 Pending
Array ( [id] => 19531736 [patent_doc_number] => 20240355638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => SEMICONDUCTOR PACKAGES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/760515 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760515
SEMICONDUCTOR PACKAGES AND RELATED METHODS Jun 30, 2024 Pending
Array ( [id] => 19517844 [patent_doc_number] => 20240349530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/752963 [patent_app_country] => US [patent_app_date] => 2024-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752963 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/752963
Display device and method of manufacturing display device Jun 24, 2024 Issued
Array ( [id] => 20411298 [patent_doc_number] => 20250380408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => INTEGRATED CIRCUIT DEVICE WITH THREE-DIMENSIONAL INVERTED FLASH MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/736971 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736971 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736971
INTEGRATED CIRCUIT DEVICE WITH THREE-DIMENSIONAL INVERTED FLASH MEMORY STRUCTURE Jun 6, 2024 Pending
Array ( [id] => 19646563 [patent_doc_number] => 20240421083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/735195 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735195 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735195
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Jun 5, 2024 Pending
Array ( [id] => 20397052 [patent_doc_number] => 20250372527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SEMICONDUCTOR MODULE INCLUDING ACTIVE LOCAL SILICON INTERCONNECT (LSI) DIE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/732668 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732668 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732668
SEMICONDUCTOR MODULE INCLUDING ACTIVE LOCAL SILICON INTERCONNECT (LSI) DIE AND METHODS OF FORMING THE SAME Jun 3, 2024 Pending
Array ( [id] => 19619202 [patent_doc_number] => 20240404882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING LOW-K METAL GATE ISOLATION AND METHODS OF FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/674975 [patent_app_country] => US [patent_app_date] => 2024-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7307 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674975 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674975
Semiconductor devices including low-k metal gate isolation and methods of fabrication thereof May 26, 2024 Issued
Array ( [id] => 20383660 [patent_doc_number] => 20250366153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => INTEGRATION OF THICK I/O OXIDE FOR NANOSHEET GATE-ALL-AROUND DEVICES [patent_app_type] => utility [patent_app_number] => 18/674334 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674334 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/674334
INTEGRATION OF THICK I/O OXIDE FOR NANOSHEET GATE-ALL-AROUND DEVICES May 23, 2024 Pending
Array ( [id] => 20705894 [patent_doc_number] => 12628626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Three-dimensional memory device and method [patent_app_type] => utility [patent_app_number] => 18/673571 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 4429 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673571 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673571
Three-dimensional memory device and method May 23, 2024 Issued
Array ( [id] => 19995503 [patent_doc_number] => 20250133725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => DRAM DEVICE HAVING SUB 4F2 STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/665643 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665643 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665643
DRAM DEVICE HAVING SUB 4F2 STRUCTURE May 15, 2024 Pending
Array ( [id] => 19604773 [patent_doc_number] => 20240395653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => HEAT DISSIPATION MEMBER, METHOD OF MANUFACTURING THE HEAT DISSIPATION MEMBER, AND SEMICONDUCTOR DEVICE INCLUDING THE HEAT DISSIPATION MEMBER [patent_app_type] => utility [patent_app_number] => 18/665769 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9306 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665769 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665769
HEAT DISSIPATION MEMBER, METHOD OF MANUFACTURING THE HEAT DISSIPATION MEMBER, AND SEMICONDUCTOR DEVICE INCLUDING THE HEAT DISSIPATION MEMBER May 15, 2024 Pending
Array ( [id] => 19988560 [patent_doc_number] => 20250126782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/656613 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656613 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/656613
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME May 6, 2024 Pending
Array ( [id] => 20853171 [patent_doc_number] => 12690223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-21 [patent_title] => Multi-threshold voltage devices and associated techniques and configurations [patent_app_type] => utility [patent_app_number] => 18/651184 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7570 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/651184
MULTI-THRESHOLD VOLTAGE DEVICES AND ASSOCIATED TECHNIQUES AND CONFIGURATIONS Apr 29, 2024 Issued
Array ( [id] => 19349195 [patent_doc_number] => 20240258159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE WITH COMPOSITE CONDUCTIVE FEATURES AND METHOD FOR PREPARING THE SAME [patent_app_type] => utility [patent_app_number] => 18/632542 [patent_app_country] => US [patent_app_date] => 2024-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/632542
Semiconductor device with composite conductive features and method for preparing the same Apr 10, 2024 Issued
Array ( [id] => 20286005 [patent_doc_number] => 20250311247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => DIELECTRIC STACK OF MIM CAPACITORS [patent_app_type] => utility [patent_app_number] => 18/623955 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623955 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623955
DIELECTRIC STACK OF MIM CAPACITORS Mar 31, 2024 Pending
Array ( [id] => 19364297 [patent_doc_number] => 20240266331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => METHODS FOR MANUFACTURING ELECTRONIC DEVICE AND TRANSFER DEVICE [patent_app_type] => utility [patent_app_number] => 18/618008 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618008 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618008
METHODS FOR MANUFACTURING ELECTRONIC DEVICE AND TRANSFER DEVICE Mar 26, 2024 Pending
Array ( [id] => 20286033 [patent_doc_number] => 20250311275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => STRAINED OHMIC CONTACT HIGH ELECTRON MOBILITY TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/616555 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/616555
STRAINED OHMIC CONTACT HIGH ELECTRON MOBILITY TRANSISTOR Mar 25, 2024 Pending
Array ( [id] => 19894972 [patent_doc_number] => 20250120284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/616958 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616958 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/616958
DISPLAY DEVICE AND MANUFACTURING METHOD OF DISPLAY DEVICE Mar 25, 2024 Pending
Array ( [id] => 19308782 [patent_doc_number] => 20240237365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => METHOD FOR MANUFACTURING A MEMORY DEVICE AND MEMORY DEVICE MANUFACTURED THROUGH THE SAME METHOD [patent_app_type] => utility [patent_app_number] => 18/615718 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615718 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615718
METHOD FOR MANUFACTURING A MEMORY DEVICE AND MEMORY DEVICE MANUFACTURED THROUGH THE SAME METHOD Mar 24, 2024 Pending
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