Thanhha S. Pham

Array ( [id] => 5859345 [patent_doc_number] => 20020123219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Method of forming a via of a dual damascene with low resistance' [patent_app_type] => new [patent_app_number] => 09/682481 [patent_app_country] => US [patent_app_date] => 2001-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1913 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20020123219.pdf [firstpage_image] =>[orig_patent_app_number] => 09682481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1416540 [patent_doc_number] => 06518183 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Hillock inhibiting method for forming a passivated copper containing conductor layer' [patent_app_type] => B1 [patent_app_number] => 09/947782 [patent_app_country] => US [patent_app_date] => 2001-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 6077 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/518/06518183.pdf [firstpage_image] =>[orig_patent_app_number] => 09947782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1034473 [patent_doc_number] => 06875682 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-05 [patent_title] => 'Mesh pad structure to eliminate IMD crack on pad' [patent_app_type] => utility [patent_app_number] => 09/945432 [patent_app_country] => US [patent_app_date] => 2001-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2044 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/875/06875682.pdf [firstpage_image] =>[orig_patent_app_number] => 09945432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6334362 [patent_doc_number] => 20020033531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-21 [patent_title] => 'Method for forming a bump, semiconductor device and method of fabricating same, semiconductor chip, circuit board, and electronic instrument' [patent_app_type] => new [patent_app_number] => 09/945241 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9461 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20020033531.pdf [firstpage_image] =>[orig_patent_app_number] => 09945241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1340080 [patent_doc_number] => 06589867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-08 [patent_title] => 'Method of fabricating a contact structure having a composite barrier layer between a platinum layer and a polysilicon plug' [patent_app_type] => B2 [patent_app_number] => 09/944436 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2324 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589867.pdf [firstpage_image] =>[orig_patent_app_number] => 09944436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1415636 [patent_doc_number] => 06511906 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-28 [patent_title] => 'Selective CMP scheme' [patent_app_type] => B1 [patent_app_number] => 09/943381 [patent_app_country] => US [patent_app_date] => 2001-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2766 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/511/06511906.pdf [firstpage_image] =>[orig_patent_app_number] => 09943381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6359454 [patent_doc_number] => 20020058412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 09/935570 [patent_app_country] => US [patent_app_date] => 2001-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10602 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20020058412.pdf [firstpage_image] =>[orig_patent_app_number] => 09935570 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1367255 [patent_doc_number] => 06558437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-06 [patent_title] => 'Method of making an ultracapacitor electrode' [patent_app_type] => B2 [patent_app_number] => 09/934234 [patent_app_country] => US [patent_app_date] => 2001-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/558/06558437.pdf [firstpage_image] =>[orig_patent_app_number] => 09934234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7617052 [patent_doc_number] => 06946389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Method of forming buried conductors' [patent_app_type] => utility [patent_app_number] => 09/930521 [patent_app_country] => US [patent_app_date] => 2001-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5004 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946389.pdf [firstpage_image] =>[orig_patent_app_number] => 09930521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 930852 [patent_doc_number] => 06979356 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-27 [patent_title] => 'Capacitor with thermosealed polymeric case for implantable medical device' [patent_app_type] => utility [patent_app_number] => 09/927567 [patent_app_country] => US [patent_app_date] => 2001-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 2918 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/979/06979356.pdf [firstpage_image] =>[orig_patent_app_number] => 09927567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1182234 [patent_doc_number] => 06744479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Active matrix display device' [patent_app_type] => B2 [patent_app_number] => 09/919916 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4864 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744479.pdf [firstpage_image] =>[orig_patent_app_number] => 09919916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6076070 [patent_doc_number] => 20020079580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Semiconductor integrated circuit device and fabrication process for the same' [patent_app_type] => new [patent_app_number] => 09/901071 [patent_app_country] => US [patent_app_date] => 2001-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3499 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20020079580.pdf [firstpage_image] =>[orig_patent_app_number] => 09901071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1216398 [patent_doc_number] => 06706584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'On-die de-coupling capacitor using bumps or bars and method of making same' [patent_app_type] => B2 [patent_app_number] => 09/895362 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3252 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706584.pdf [firstpage_image] =>[orig_patent_app_number] => 09895362 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1324410 [patent_doc_number] => 06602788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Process for fabricating an interconnect for contact holes' [patent_app_type] => B2 [patent_app_number] => 09/894942 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 3952 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602788.pdf [firstpage_image] =>[orig_patent_app_number] => 09894942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1231409 [patent_doc_number] => 06693032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'Method of forming a contact structure having an anchoring portion' [patent_app_type] => B2 [patent_app_number] => 09/892362 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 2981 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693032.pdf [firstpage_image] =>[orig_patent_app_number] => 09892362 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1528170 [patent_doc_number] => 06479399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-12 [patent_title] => 'Method of forming interlevel dielectric layer of semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/885091 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1890 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/479/06479399.pdf [firstpage_image] =>[orig_patent_app_number] => 09885091 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6322655 [patent_doc_number] => 20020196996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Interconnect structure and process for silicon optical bench' [patent_app_type] => new [patent_app_number] => 09/885791 [patent_app_country] => US [patent_app_date] => 2001-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4002 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20020196996.pdf [firstpage_image] =>[orig_patent_app_number] => 09885791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1216335 [patent_doc_number] => 06706554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Conductor posts, construction for and method of fabricating semiconductor integrated circuit chips using the conductor post, and method of probing semiconductor integrated circuit chips' [patent_app_type] => B2 [patent_app_number] => 09/883363 [patent_app_country] => US [patent_app_date] => 2001-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 120 [patent_no_of_words] => 11688 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706554.pdf [firstpage_image] =>[orig_patent_app_number] => 09883363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1574795 [patent_doc_number] => 06468904 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-22 [patent_title] => 'RPO process for selective CoSix formation' [patent_app_type] => B1 [patent_app_number] => 09/883162 [patent_app_country] => US [patent_app_date] => 2001-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1738 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/468/06468904.pdf [firstpage_image] =>[orig_patent_app_number] => 09883162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6649386 [patent_doc_number] => 20030008070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Low-resistivity tungsten from high-pressure chemical vapor deposition using metal-organic precursor' [patent_app_type] => new [patent_app_number] => 09/880465 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3675 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20030008070.pdf [firstpage_image] =>[orig_patent_app_number] => 09880465 [rel_patent_id] =>[rel_patent_doc_number] =>)