Search

Thanhha S. Pham

Examiner (ID: 11625)

Most Active Art Unit
2819
Art Unit(s)
2813, 2819, 2812, 2894
Total Applications
1754
Issued Applications
1445
Pending Applications
106
Abandoned Applications
230

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17025474 [patent_doc_number] => 20210249346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => PROCESS TO YIELD ULTRA-LARGE INTEGRATED CIRCUITS AND ASSOCIATED INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/789210 [patent_app_country] => US [patent_app_date] => 2020-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16789210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/789210
Process to yield ultra-large integrated circuits and associated integrated circuits Feb 11, 2020 Issued
Array ( [id] => 17025479 [patent_doc_number] => 20210249351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => SINGLE-MASK ALTERNATING LINE DEPOSITION [patent_app_type] => utility [patent_app_number] => 16/786393 [patent_app_country] => US [patent_app_date] => 2020-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16786393 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/786393
Single-mask alternating line deposition Feb 9, 2020 Issued
Array ( [id] => 17456042 [patent_doc_number] => 11270909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Apparatus with species on or in conductive material on elongate lines [patent_app_type] => utility [patent_app_number] => 16/773636 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 10594 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16773636 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/773636
Apparatus with species on or in conductive material on elongate lines Jan 26, 2020 Issued
Array ( [id] => 15938565 [patent_doc_number] => 20200160916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => METHOD FOR DETECTING A THINNING OF THE SEMICONDUCTOR SUBSTRATE OF AN INTEGRATED CIRCUIT FROM ITS BACK FACE AND CORRESPONDING INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/747995 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16747995 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/747995
Method for detecting a thinning of the semiconductor substrate of an integrated circuit from its back face and corresponding integrated circuit Jan 20, 2020 Issued
Array ( [id] => 16560326 [patent_doc_number] => 20210005475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => WAFER TO WAFER BONDING METHODS AND WAFER TO WAFER BONDING APPARATUSES [patent_app_type] => utility [patent_app_number] => 16/747783 [patent_app_country] => US [patent_app_date] => 2020-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 356 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16747783 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/747783
Wafer to wafer bonding apparatuses Jan 20, 2020 Issued
Array ( [id] => 16981460 [patent_doc_number] => 20210225697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH STACKED CONDUCTIVE STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/744503 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744503
Structure and formation method of semiconductor device with stacked conductive structures Jan 15, 2020 Issued
Array ( [id] => 16194349 [patent_doc_number] => 20200235198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/743963 [patent_app_country] => US [patent_app_date] => 2020-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16743963 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/743963
SEMICONDUCTOR DEVICE Jan 14, 2020 Abandoned
Array ( [id] => 16638166 [patent_doc_number] => 10916683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Contact etching and metallization for improved LED device performance and reliability [patent_app_type] => utility [patent_app_number] => 16/736424 [patent_app_country] => US [patent_app_date] => 2020-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736424 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/736424
Contact etching and metallization for improved LED device performance and reliability Jan 6, 2020 Issued
Array ( [id] => 17848124 [patent_doc_number] => 11437511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Multi-threshold voltage devices and associated techniques and configurations [patent_app_type] => utility [patent_app_number] => 16/735472 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 12223 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735472 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735472
Multi-threshold voltage devices and associated techniques and configurations Jan 5, 2020 Issued
Array ( [id] => 16973687 [patent_doc_number] => 11069669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Micro LED display panel and method for making same [patent_app_type] => utility [patent_app_number] => 16/734010 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4455 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734010 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734010
Micro LED display panel and method for making same Jan 2, 2020 Issued
Array ( [id] => 15840599 [patent_doc_number] => 20200135582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/726201 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726201 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/726201
Semiconductor device and method for fabricating the same Dec 22, 2019 Issued
Array ( [id] => 15840973 [patent_doc_number] => 20200135769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Metal Oxide Thin Film Semiconductor Device Monolithically Integrated With Dissimilar Device on the Same Wafer [patent_app_type] => utility [patent_app_number] => 16/722022 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16722022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/722022
Metal oxide thin film semiconductor device monolithically integrated with dissimilar device on the same wafer Dec 19, 2019 Issued
Array ( [id] => 16098405 [patent_doc_number] => 20200203189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/716738 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16716738 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/716738
Substrate processing apparatus with resistance value varying mechanism Dec 16, 2019 Issued
Array ( [id] => 19123554 [patent_doc_number] => 11967548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Assembly including plural through wafer vias, method of cooling the assembly and method of fabricating the assembly [patent_app_type] => utility [patent_app_number] => 16/715145 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715145 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715145
Assembly including plural through wafer vias, method of cooling the assembly and method of fabricating the assembly Dec 15, 2019 Issued
Array ( [id] => 17166143 [patent_doc_number] => 11152255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Methods of performing chemical-mechanical polishing process in semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/712430 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 8342 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16712430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/712430
Methods of performing chemical-mechanical polishing process in semiconductor devices Dec 11, 2019 Issued
Array ( [id] => 17353170 [patent_doc_number] => 11227817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Compact leadframe package [patent_app_type] => utility [patent_app_number] => 16/707823 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3599 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707823 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707823
Compact leadframe package Dec 8, 2019 Issued
Array ( [id] => 16759784 [patent_doc_number] => 10978341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Contact openings and methods forming same [patent_app_type] => utility [patent_app_number] => 16/704536 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 5117 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704536 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704536
Contact openings and methods forming same Dec 4, 2019 Issued
Array ( [id] => 16332443 [patent_doc_number] => 20200303409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SEMICONDUCTOR DEVICE AND APPARATUS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/700801 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700801 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/700801
Semiconductor device and apparatus of manufacturing the same Dec 1, 2019 Issued
Array ( [id] => 15688403 [patent_doc_number] => 20200098865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/693048 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693048 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693048
Semiconductor device and fabricating method thereof Nov 21, 2019 Issued
Array ( [id] => 15688405 [patent_doc_number] => 20200098866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/693058 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693058 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693058
Semiconductor device and fabricating method thereof Nov 21, 2019 Issued
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