Search

Thanhha S. Pham

Examiner (ID: 11625)

Most Active Art Unit
2819
Art Unit(s)
2813, 2819, 2812, 2894
Total Applications
1754
Issued Applications
1445
Pending Applications
106
Abandoned Applications
230

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18714861 [patent_doc_number] => 20230337506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => DISPLAY APPARATUS AND COVER WINDOW FOR DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/133994 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133994 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133994
DISPLAY APPARATUS AND COVER WINDOW FOR DISPLAY APPARATUS Apr 11, 2023 Pending
Array ( [id] => 18882867 [patent_doc_number] => 20240006236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => PLASMA ENHANCED TUNGSTEN NUCLEATION FOR LOW RESISTIVITY [patent_app_type] => utility [patent_app_number] => 18/133065 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133065
PLASMA ENHANCED TUNGSTEN NUCLEATION FOR LOW RESISTIVITY Apr 10, 2023 Pending
Array ( [id] => 18882867 [patent_doc_number] => 20240006236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => PLASMA ENHANCED TUNGSTEN NUCLEATION FOR LOW RESISTIVITY [patent_app_type] => utility [patent_app_number] => 18/133065 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133065
PLASMA ENHANCED TUNGSTEN NUCLEATION FOR LOW RESISTIVITY Apr 10, 2023 Pending
Array ( [id] => 19484082 [patent_doc_number] => 20240332124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => POROUS STRUCTURE WITH MICROCHANNELS [patent_app_type] => utility [patent_app_number] => 18/129409 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129409 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/129409
POROUS STRUCTURE WITH MICROCHANNELS Mar 30, 2023 Pending
Array ( [id] => 19484306 [patent_doc_number] => 20240332348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => MEMORY DEVICE HAVING A CONTAINER-SHAPED ELECTRODE [patent_app_type] => utility [patent_app_number] => 18/126573 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18126573 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/126573
MEMORY DEVICE HAVING A CONTAINER-SHAPED ELECTRODE Mar 26, 2023 Pending
Array ( [id] => 19654481 [patent_doc_number] => 12176281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Semiconductor device with uneven electrode surface and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/124763 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9771 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124763 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124763
Semiconductor device with uneven electrode surface and method for fabricating the same Mar 21, 2023 Issued
Array ( [id] => 19452709 [patent_doc_number] => 20240312839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => FULLY ALIGNED VIA TO SINGLE DAMASCENE UPPER TRENCH [patent_app_type] => utility [patent_app_number] => 18/122680 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18122680 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/122680
FULLY ALIGNED VIA TO SINGLE DAMASCENE UPPER TRENCH Mar 15, 2023 Pending
Array ( [id] => 19452914 [patent_doc_number] => 20240313044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => Treatment of Electrodes of MIM Capacitors [patent_app_type] => utility [patent_app_number] => 18/184999 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184999 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184999
Treatment of Electrodes of MIM Capacitors Mar 15, 2023 Pending
Array ( [id] => 20162956 [patent_doc_number] => 12389613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 18/183165 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18183165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/183165
Semiconductor structure Mar 13, 2023 Issued
Array ( [id] => 19378263 [patent_doc_number] => 12069860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Semiconductor device and manufacturing method of semiconductor device [patent_app_type] => utility [patent_app_number] => 18/110604 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 63 [patent_no_of_words] => 10265 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110604 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110604
Semiconductor device and manufacturing method of semiconductor device Feb 15, 2023 Issued
Array ( [id] => 19906602 [patent_doc_number] => 12283621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Semiconductor device having a transistor with trenches and mesas [patent_app_type] => utility [patent_app_number] => 18/109997 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 7108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/109997
Semiconductor device having a transistor with trenches and mesas Feb 14, 2023 Issued
Array ( [id] => 18641264 [patent_doc_number] => 11765908 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-19 [patent_title] => Memory device fabrication through wafer bonding [patent_app_type] => utility [patent_app_number] => 18/167816 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 84 [patent_no_of_words] => 40974 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167816 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/167816
Memory device fabrication through wafer bonding Feb 9, 2023 Issued
Array ( [id] => 19966675 [patent_doc_number] => 12336213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Multi-gate semiconductor device and method for forming the same [patent_app_type] => utility [patent_app_number] => 18/164965 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 83 [patent_no_of_words] => 8152 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164965 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/164965
Multi-gate semiconductor device and method for forming the same Feb 5, 2023 Issued
Array ( [id] => 20267038 [patent_doc_number] => 12438037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Manufacturing method of semiconductor structure [patent_app_type] => utility [patent_app_number] => 18/162635 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162635
Manufacturing method of semiconductor structure Jan 30, 2023 Issued
Array ( [id] => 18898651 [patent_doc_number] => 20240014136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => ANALOG-CELLS-BOUNDARY REGION WITH BURIED POWER GRID SEGMENT, SEMICONDUCTOR DEVICE INCLUDING SAME AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/158240 [patent_app_country] => US [patent_app_date] => 2023-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17669 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158240 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/158240
ANALOG-CELLS-BOUNDARY REGION WITH BURIED POWER GRID SEGMENT, SEMICONDUCTOR DEVICE INCLUDING SAME AND METHOD OF MANUFACTURING SAME Jan 22, 2023 Pending
Array ( [id] => 19146347 [patent_doc_number] => 20240145377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => PLANARIZATION STRUCTURE FOR MIM TOPOGRAPHY [patent_app_type] => utility [patent_app_number] => 18/150299 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18150299 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/150299
Planarization structure for MIM topography Jan 4, 2023 Issued
Array ( [id] => 19285789 [patent_doc_number] => 20240222266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/149719 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149719
Semiconductor structure and manufacturing method thereof Jan 3, 2023 Issued
Array ( [id] => 19428186 [patent_doc_number] => 12087619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 18/087802 [patent_app_country] => US [patent_app_date] => 2022-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4043 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18087802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/087802
Semiconductor device and method of fabricating the same Dec 21, 2022 Issued
Array ( [id] => 19875116 [patent_doc_number] => 12268002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/065298 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11605 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/065298
Semiconductor memory device Dec 12, 2022 Issued
Array ( [id] => 18284655 [patent_doc_number] => 20230100127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR DIE PACKAGE WITH THERMAL MANAGEMENT FEATURES [patent_app_type] => utility [patent_app_number] => 18/061501 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061501 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/061501
Semiconductor die package with thermal management features Dec 4, 2022 Issued
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