Search

Thanhha S. Pham

Examiner (ID: 11625)

Most Active Art Unit
2819
Art Unit(s)
2813, 2819, 2812, 2894
Total Applications
1754
Issued Applications
1445
Pending Applications
106
Abandoned Applications
230

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9542473 [patent_doc_number] => 20140167120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'METHODS OF FORMING A FINFET SEMICONDUCTOR DEVICE BY PERFORMING AN EPITAXIAL GROWTH PROCESS' [patent_app_type] => utility [patent_app_number] => 13/716686 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9007 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716686 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/716686
Methods of forming a FinFET semiconductor device by performing an epitaxial growth process Dec 16, 2012 Issued
Array ( [id] => 8777404 [patent_doc_number] => 20130099379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, CIRCUIT SUBSTRATE, ELECTRO-OPTICAL APPARATUS, AND ELECTRONIC EQUIPMENT' [patent_app_type] => utility [patent_app_number] => 13/714991 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4965 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714991 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714991
SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, CIRCUIT SUBSTRATE, ELECTRO-OPTICAL APPARATUS, AND ELECTRONIC EQUIPMENT Dec 13, 2012 Abandoned
Array ( [id] => 9542492 [patent_doc_number] => 20140167139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Integrated Circuits With Non-Volatile Memory and Methods for Manufacture' [patent_app_type] => utility [patent_app_number] => 13/715565 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9315 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715565
Integrated circuits with non-volatile memory and methods for manufacture Dec 13, 2012 Issued
Array ( [id] => 8884276 [patent_doc_number] => 20130157460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'METHODS FOR ANNEALING A METAL CONTACT LAYER TO FORM A METAL SILICIDATION LAYER' [patent_app_type] => utility [patent_app_number] => 13/714588 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714588 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714588
Methods for annealing a contact metal layer to form a metal silicidation layer Dec 13, 2012 Issued
Array ( [id] => 9360333 [patent_doc_number] => 20140070206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'Array Substrate, Method For Manufacturing The Same And Display Device' [patent_app_type] => utility [patent_app_number] => 13/981165 [patent_app_country] => US [patent_app_date] => 2012-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13981165 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/981165
Array substrate, method for manufacturing the same and display device Nov 14, 2012 Issued
Array ( [id] => 8744996 [patent_doc_number] => 20130084713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'DIELECTRIC LAYER FOR SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/661748 [patent_app_country] => US [patent_app_date] => 2012-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4739 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13661748 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/661748
Dielectric layer for semiconductor device and method of manufacturing the same Oct 25, 2012 Issued
Array ( [id] => 9250730 [patent_doc_number] => 08614512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-24 [patent_title] => 'Solder ball contact susceptible to lower stress' [patent_app_type] => utility [patent_app_number] => 13/615804 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5714 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13615804 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/615804
Solder ball contact susceptible to lower stress Sep 13, 2012 Issued
Array ( [id] => 10118599 [patent_doc_number] => 09153487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Methods of forming wirings in electronic devices' [patent_app_type] => utility [patent_app_number] => 13/601658 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 6056 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13601658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/601658
Methods of forming wirings in electronic devices Aug 30, 2012 Issued
Array ( [id] => 8875694 [patent_doc_number] => 08470659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Method for reducing interfacial layer thickness for high-k and metal gate stack' [patent_app_type] => utility [patent_app_number] => 13/595599 [patent_app_country] => US [patent_app_date] => 2012-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13595599 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/595599
Method for reducing interfacial layer thickness for high-k and metal gate stack Aug 26, 2012 Issued
Array ( [id] => 9167278 [patent_doc_number] => 08592961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/562639 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 7422 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562639 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562639
Method of manufacturing a semiconductor device Jul 30, 2012 Issued
Array ( [id] => 8483363 [patent_doc_number] => 20120282770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/553258 [patent_app_country] => US [patent_app_date] => 2012-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6307 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13553258 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/553258
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Jul 18, 2012 Abandoned
Array ( [id] => 8625081 [patent_doc_number] => 08357575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers' [patent_app_type] => utility [patent_app_number] => 13/550435 [patent_app_country] => US [patent_app_date] => 2012-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8226 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550435 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/550435
Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers Jul 15, 2012 Issued
Array ( [id] => 8414265 [patent_doc_number] => 20120241765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRAIN AND METHODS OF MANUFACTURING AND DESIGN STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/491036 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3995 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491036 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/491036
Semiconductor devices having tensile and/or compressive strain and methods of manufacturing and design structure Jun 6, 2012 Issued
Array ( [id] => 9482731 [patent_doc_number] => 08728680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Method to enhance the durability of conductive carbon coating of PEM fuel cell bipolar plates' [patent_app_type] => utility [patent_app_number] => 13/485209 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4640 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13485209 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/485209
Method to enhance the durability of conductive carbon coating of PEM fuel cell bipolar plates May 30, 2012 Issued
Array ( [id] => 8346263 [patent_doc_number] => 20120207185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR LASER, SEMICONDUCTOR LASER, OPTICAL PICKUP, OPTICAL DISK DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND METHOD OF GROWING NITRIDE TYPE GROUP III-V COMPOUND SEMICONDUCTOR LAYER' [patent_app_type] => utility [patent_app_number] => 13/451880 [patent_app_country] => US [patent_app_date] => 2012-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 16713 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13451880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/451880
Method of manufacturing semiconductor laser, semiconductor laser, optical pickup, optical disk device, method of manufacturing semiconductor device, semiconductor device, and method of growing nitride type Group III-V compound semiconductor layer Apr 19, 2012 Issued
Array ( [id] => 8335620 [patent_doc_number] => 20120202328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'METHOD FOR FABRICATING MOS TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/450476 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1936 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13450476 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/450476
METHOD FOR FABRICATING MOS TRANSISTOR Apr 18, 2012 Abandoned
Array ( [id] => 8344734 [patent_doc_number] => 20120205655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'METHOD TO TEXTURE A LAMINA SURFACE WITHIN A PHOTOVOLTAIC CELL' [patent_app_type] => utility [patent_app_number] => 13/446051 [patent_app_country] => US [patent_app_date] => 2012-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5577 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13446051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/446051
Method to texture a lamina surface within a photovoltaic cell Apr 12, 2012 Issued
Array ( [id] => 9971025 [patent_doc_number] => 09018032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'CIGS solar cell structure and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/445997 [patent_app_country] => US [patent_app_date] => 2012-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13445997 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/445997
CIGS solar cell structure and method for fabricating the same Apr 12, 2012 Issued
Array ( [id] => 11599997 [patent_doc_number] => 09647176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Reflective display devices' [patent_app_type] => utility [patent_app_number] => 14/111115 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2181 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14111115 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/111115
Reflective display devices Apr 4, 2012 Issued
Array ( [id] => 11599997 [patent_doc_number] => 09647176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Reflective display devices' [patent_app_type] => utility [patent_app_number] => 14/111115 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2181 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14111115 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/111115
Reflective display devices Apr 4, 2012 Issued
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