
Thanhha S. Pham
Examiner (ID: 11625)
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2813, 2819, 2812, 2894 |
| Total Applications | 1754 |
| Issued Applications | 1445 |
| Pending Applications | 106 |
| Abandoned Applications | 230 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9542473
[patent_doc_number] => 20140167120
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'METHODS OF FORMING A FINFET SEMICONDUCTOR DEVICE BY PERFORMING AN EPITAXIAL GROWTH PROCESS'
[patent_app_type] => utility
[patent_app_number] => 13/716686
[patent_app_country] => US
[patent_app_date] => 2012-12-17
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/716686 | Methods of forming a FinFET semiconductor device by performing an epitaxial growth process | Dec 16, 2012 | Issued |
Array
(
[id] => 8777404
[patent_doc_number] => 20130099379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, CIRCUIT SUBSTRATE, ELECTRO-OPTICAL APPARATUS, AND ELECTRONIC EQUIPMENT'
[patent_app_type] => utility
[patent_app_number] => 13/714991
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Array
(
[id] => 9542492
[patent_doc_number] => 20140167139
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'Integrated Circuits With Non-Volatile Memory and Methods for Manufacture'
[patent_app_type] => utility
[patent_app_number] => 13/715565
[patent_app_country] => US
[patent_app_date] => 2012-12-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/715565 | Integrated circuits with non-volatile memory and methods for manufacture | Dec 13, 2012 | Issued |
Array
(
[id] => 8884276
[patent_doc_number] => 20130157460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'METHODS FOR ANNEALING A METAL CONTACT LAYER TO FORM A METAL SILICIDATION LAYER'
[patent_app_type] => utility
[patent_app_number] => 13/714588
[patent_app_country] => US
[patent_app_date] => 2012-12-14
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/714588 | Methods for annealing a contact metal layer to form a metal silicidation layer | Dec 13, 2012 | Issued |
Array
(
[id] => 9360333
[patent_doc_number] => 20140070206
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-13
[patent_title] => 'Array Substrate, Method For Manufacturing The Same And Display Device'
[patent_app_type] => utility
[patent_app_number] => 13/981165
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[patent_app_date] => 2012-11-15
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Array
(
[id] => 8744996
[patent_doc_number] => 20130084713
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[patent_kind] => A1
[patent_issue_date] => 2013-04-04
[patent_title] => 'DIELECTRIC LAYER FOR SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/661748
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Array
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[patent_doc_number] => 08614512
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[patent_issue_date] => 2013-12-24
[patent_title] => 'Solder ball contact susceptible to lower stress'
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Array
(
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[patent_doc_number] => 09153487
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[patent_kind] => B2
[patent_issue_date] => 2015-10-06
[patent_title] => 'Methods of forming wirings in electronic devices'
[patent_app_type] => utility
[patent_app_number] => 13/601658
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/601658 | Methods of forming wirings in electronic devices | Aug 30, 2012 | Issued |
Array
(
[id] => 8875694
[patent_doc_number] => 08470659
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[patent_kind] => B2
[patent_issue_date] => 2013-06-25
[patent_title] => 'Method for reducing interfacial layer thickness for high-k and metal gate stack'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/595599 | Method for reducing interfacial layer thickness for high-k and metal gate stack | Aug 26, 2012 | Issued |
Array
(
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[patent_title] => 'Method of manufacturing a semiconductor device'
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Array
(
[id] => 8483363
[patent_doc_number] => 20120282770
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[patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE'
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Array
(
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[patent_title] => 'Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers'
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Array
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Array
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[patent_title] => 'Method to enhance the durability of conductive carbon coating of PEM fuel cell bipolar plates'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/485209 | Method to enhance the durability of conductive carbon coating of PEM fuel cell bipolar plates | May 30, 2012 | Issued |
Array
(
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[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR LASER, SEMICONDUCTOR LASER, OPTICAL PICKUP, OPTICAL DISK DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND METHOD OF GROWING NITRIDE TYPE GROUP III-V COMPOUND SEMICONDUCTOR LAYER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/451880 | Method of manufacturing semiconductor laser, semiconductor laser, optical pickup, optical disk device, method of manufacturing semiconductor device, semiconductor device, and method of growing nitride type Group III-V compound semiconductor layer | Apr 19, 2012 | Issued |
Array
(
[id] => 8335620
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/446051 | Method to texture a lamina surface within a photovoltaic cell | Apr 12, 2012 | Issued |
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