Search

Thanhha S. Pham

Examiner (ID: 11625)

Most Active Art Unit
2819
Art Unit(s)
2813, 2819, 2812, 2894
Total Applications
1754
Issued Applications
1445
Pending Applications
106
Abandoned Applications
230

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8198565 [patent_doc_number] => 20120122301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'METHOD OF MANUFACTURING GaN-BASED FILM' [patent_app_type] => utility [patent_app_number] => 13/283963 [patent_app_country] => US [patent_app_date] => 2011-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6920 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20120122301.pdf [firstpage_image] =>[orig_patent_app_number] => 13283963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/283963
Method of manufacturing GaN-based film Oct 27, 2011 Issued
Array ( [id] => 8198565 [patent_doc_number] => 20120122301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'METHOD OF MANUFACTURING GaN-BASED FILM' [patent_app_type] => utility [patent_app_number] => 13/283963 [patent_app_country] => US [patent_app_date] => 2011-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6920 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20120122301.pdf [firstpage_image] =>[orig_patent_app_number] => 13283963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/283963
Method of manufacturing GaN-based film Oct 27, 2011 Issued
Array ( [id] => 8792194 [patent_doc_number] => 20130109163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'FABRICATING METHOD OF SEMICONDUCTOR ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/283690 [patent_app_country] => US [patent_app_date] => 2011-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1532 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13283690 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/283690
Fabricating method of semiconductor element Oct 27, 2011 Issued
Array ( [id] => 8198565 [patent_doc_number] => 20120122301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'METHOD OF MANUFACTURING GaN-BASED FILM' [patent_app_type] => utility [patent_app_number] => 13/283963 [patent_app_country] => US [patent_app_date] => 2011-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6920 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20120122301.pdf [firstpage_image] =>[orig_patent_app_number] => 13283963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/283963
Method of manufacturing GaN-based film Oct 27, 2011 Issued
Array ( [id] => 8792172 [patent_doc_number] => 20130109141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'TRANSISTORS WITH DIFFERENT THRESHOLD VOLTAGES' [patent_app_type] => utility [patent_app_number] => 13/282210 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13282210 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/282210
Transistors with different threshold voltages Oct 25, 2011 Issued
Array ( [id] => 8796977 [patent_doc_number] => 08435844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 13/281465 [patent_app_country] => US [patent_app_date] => 2011-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 3986 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13281465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/281465
Semiconductor device manufacturing method Oct 25, 2011 Issued
Array ( [id] => 7773106 [patent_doc_number] => 20120037996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'SRAM BIT CELL WITH SELF-ALIGNED BIDIRECTIONAL LOCAL INTERCONNECTS' [patent_app_type] => utility [patent_app_number] => 13/280848 [patent_app_country] => US [patent_app_date] => 2011-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20120037996.pdf [firstpage_image] =>[orig_patent_app_number] => 13280848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/280848
SRAM BIT CELL WITH SELF-ALIGNED BIDIRECTIONAL LOCAL INTERCONNECTS Oct 24, 2011 Abandoned
Array ( [id] => 7777535 [patent_doc_number] => 20120040510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'Dicing Before Grinding Process for Preparation of Semiconductor' [patent_app_type] => utility [patent_app_number] => 13/279400 [patent_app_country] => US [patent_app_date] => 2011-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1666 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20120040510.pdf [firstpage_image] =>[orig_patent_app_number] => 13279400 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/279400
Dicing Before Grinding Process for Preparation of Semiconductor Oct 23, 2011 Abandoned
Array ( [id] => 8780142 [patent_doc_number] => 20130102117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'Manufacturing Processes for Field Effect Transistors Having Strain-Induced Chanels' [patent_app_type] => utility [patent_app_number] => 13/278285 [patent_app_country] => US [patent_app_date] => 2011-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2935 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278285 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/278285
Manufacturing Processes for Field Effect Transistors Having Strain-Induced Chanels Oct 20, 2011 Abandoned
Array ( [id] => 8955795 [patent_doc_number] => 08501567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Manufacturing method of high voltage device' [patent_app_type] => utility [patent_app_number] => 13/317568 [patent_app_country] => US [patent_app_date] => 2011-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4584 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13317568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/317568
Manufacturing method of high voltage device Oct 20, 2011 Issued
Array ( [id] => 8802794 [patent_doc_number] => 08441069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Structure and method for forming trench-gate field effect transistor with source plug' [patent_app_type] => utility [patent_app_number] => 13/279085 [patent_app_country] => US [patent_app_date] => 2011-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 31 [patent_no_of_words] => 4658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13279085 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/279085
Structure and method for forming trench-gate field effect transistor with source plug Oct 20, 2011 Issued
Array ( [id] => 7784336 [patent_doc_number] => 20120045892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/278709 [patent_app_country] => US [patent_app_date] => 2011-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7194 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20120045892.pdf [firstpage_image] =>[orig_patent_app_number] => 13278709 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/278709
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Oct 20, 2011 Abandoned
Array ( [id] => 8767583 [patent_doc_number] => 20130095620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'METHODS OF FORMING HIGHLY SCALED SEMICONDUCTOR DEVICES USING A DISPOSABLE SPACER TECHNIQUE' [patent_app_type] => utility [patent_app_number] => 13/275766 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275766 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/275766
Methods of forming highly scaled semiconductor devices using a disposable spacer technique Oct 17, 2011 Issued
Array ( [id] => 9389176 [patent_doc_number] => 08685773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Method for making semiconductor epitaxial structure' [patent_app_type] => utility [patent_app_number] => 13/276265 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 14075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13276265 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/276265
Method for making semiconductor epitaxial structure Oct 17, 2011 Issued
Array ( [id] => 8289915 [patent_doc_number] => 20120178242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'METHOD FOR MAKING EPITAXIAL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/275564 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 14071 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275564 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/275564
Method for making epitaxial structure Oct 17, 2011 Issued
Array ( [id] => 10882411 [patent_doc_number] => 08906788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Method for making epitaxial structure' [patent_app_type] => utility [patent_app_number] => 13/276309 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 14070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13276309 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/276309
Method for making epitaxial structure Oct 17, 2011 Issued
Array ( [id] => 8289916 [patent_doc_number] => 20120178244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'METHOD FOR MAKING EPITAXIAL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/276285 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 14071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13276285 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/276285
Method for making epitaxial structure Oct 17, 2011 Issued
Array ( [id] => 8127605 [patent_doc_number] => 20120088351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'METHOD FOR TRANSFERRING AT LEAST ONE MICRO-TECHNOLOGICAL LAYER' [patent_app_type] => utility [patent_app_number] => 13/271401 [patent_app_country] => US [patent_app_date] => 2011-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4237 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20120088351.pdf [firstpage_image] =>[orig_patent_app_number] => 13271401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271401
Method for transferring at least one micro-technological layer Oct 11, 2011 Issued
Array ( [id] => 8198583 [patent_doc_number] => 20120122309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING A WORK FUNCTION CONTROL FILM' [patent_app_type] => utility [patent_app_number] => 13/241871 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5335 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20120122309.pdf [firstpage_image] =>[orig_patent_app_number] => 13241871 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/241871
Method of fabricating semiconductor device using a work function control film Sep 22, 2011 Issued
Array ( [id] => 8159447 [patent_doc_number] => 20120100706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'Microelectronic Fabrication Methods Using Composite Layers for Double Patterning' [patent_app_type] => utility [patent_app_number] => 13/241788 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 14149 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20120100706.pdf [firstpage_image] =>[orig_patent_app_number] => 13241788 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/241788
Microelectronic fabrication methods using composite layers for double patterning Sep 22, 2011 Issued
Menu