
Thanhnga B. Truong
Examiner (ID: 2062)
| Most Active Art Unit | 2438 |
| Art Unit(s) | 2435, 2135, 2438, 2498 |
| Total Applications | 886 |
| Issued Applications | 752 |
| Pending Applications | 24 |
| Abandoned Applications | 114 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8244840
[patent_doc_number] => 08202763
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-19
[patent_title] => 'Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device'
[patent_app_type] => utility
[patent_app_number] => 12/899642
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 36
[patent_no_of_words] => 5998
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/202/08202763.pdf
[firstpage_image] =>[orig_patent_app_number] => 12899642
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/899642 | Semiconductor chip package, semiconductor chip assembly, and method for fabricating a device | Oct 6, 2010 | Issued |
Array
(
[id] => 8592512
[patent_doc_number] => 08350389
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-08
[patent_title] => 'Semiconductor device and information processing system including the same'
[patent_app_type] => utility
[patent_app_number] => 12/923789
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 25
[patent_no_of_words] => 12851
[patent_no_of_claims] => 22
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[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12923789
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/923789 | Semiconductor device and information processing system including the same | Oct 6, 2010 | Issued |
Array
(
[id] => 8202950
[patent_doc_number] => 08188575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-29
[patent_title] => 'Apparatus and method for uniform metal plating'
[patent_app_type] => utility
[patent_app_number] => 12/898622
[patent_app_country] => US
[patent_app_date] => 2010-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 35
[patent_no_of_words] => 13550
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/188/08188575.pdf
[firstpage_image] =>[orig_patent_app_number] => 12898622
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/898622 | Apparatus and method for uniform metal plating | Oct 4, 2010 | Issued |
Array
(
[id] => 8190295
[patent_doc_number] => 08183693
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-22
[patent_title] => 'Electronic device, method of producing the same, and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/897173
[patent_app_country] => US
[patent_app_date] => 2010-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 6029
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/183/08183693.pdf
[firstpage_image] =>[orig_patent_app_number] => 12897173
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/897173 | Electronic device, method of producing the same, and semiconductor device | Oct 3, 2010 | Issued |
Array
(
[id] => 5993096
[patent_doc_number] => 20110014749
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-20
[patent_title] => 'Method for Packaging Semiconductor Dies Having Through-Silicon Vias'
[patent_app_type] => utility
[patent_app_number] => 12/883910
[patent_app_country] => US
[patent_app_date] => 2010-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 2216
[patent_no_of_claims] => 21
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20110014749.pdf
[firstpage_image] =>[orig_patent_app_number] => 12883910
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/883910 | Method for packaging semiconductor dies having through-silicon vias | Sep 15, 2010 | Issued |
Array
(
[id] => 6007549
[patent_doc_number] => 20110059580
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-10
[patent_title] => 'HIGH-POWER SEMICONDUCTOR DIE PACKAGES WITH INTEGRATED HEAT-SINK CAPABILITY AND METHODS OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/883044
[patent_app_country] => US
[patent_app_date] => 2010-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 6585
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[pdf_file] => publications/A1/0059/20110059580.pdf
[firstpage_image] =>[orig_patent_app_number] => 12883044
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/883044 | High-power semiconductor die packages with integrated heat-sink capability and methods of manufacturing the same | Sep 14, 2010 | Issued |
Array
(
[id] => 9504285
[patent_doc_number] => 08742603
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-03
[patent_title] => 'Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC)'
[patent_app_type] => utility
[patent_app_number] => 12/882525
[patent_app_country] => US
[patent_app_date] => 2010-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 3916
[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12882525
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/882525 | Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC) | Sep 14, 2010 | Issued |
Array
(
[id] => 8165843
[patent_doc_number] => 08174126
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-08
[patent_title] => 'Stacked multi-chip'
[patent_app_type] => utility
[patent_app_number] => 12/882805
[patent_app_country] => US
[patent_app_date] => 2010-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1283
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 310
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/174/08174126.pdf
[firstpage_image] =>[orig_patent_app_number] => 12882805
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/882805 | Stacked multi-chip | Sep 14, 2010 | Issued |
Array
(
[id] => 7815239
[patent_doc_number] => 20120061859
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULANT CONTAINMENT AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/882856
[patent_app_country] => US
[patent_app_date] => 2010-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0061/20120061859.pdf
[firstpage_image] =>[orig_patent_app_number] => 12882856
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/882856 | Integrated circuit packaging system with encapsulant containment and method of manufacture thereof | Sep 14, 2010 | Issued |
Array
(
[id] => 7815234
[patent_doc_number] => 20120061854
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/881983
[patent_app_country] => US
[patent_app_date] => 2010-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => publications/A1/0061/20120061854.pdf
[firstpage_image] =>[orig_patent_app_number] => 12881983
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/881983 | Integrated circuit packaging system with package-on-package and method of manufacture thereof | Sep 13, 2010 | Issued |
Array
(
[id] => 7815237
[patent_doc_number] => 20120061857
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'Electronic Packaging With A Variable Thickness Mold Cap'
[patent_app_type] => utility
[patent_app_number] => 12/881549
[patent_app_country] => US
[patent_app_date] => 2010-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[firstpage_image] =>[orig_patent_app_number] => 12881549
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/881549 | Electronic packaging with a variable thickness mold cap | Sep 13, 2010 | Issued |
Array
(
[id] => 7815238
[patent_doc_number] => 20120061858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'Semiconductor Device and Method of Forming Mold Underfill Using Dispensing Needle Having Same Width as Semiconductor Die'
[patent_app_type] => utility
[patent_app_number] => 12/882083
[patent_app_country] => US
[patent_app_date] => 2010-09-14
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 12882083
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/882083 | Semiconductor device and method of forming mold underfill using dispensing needle having same width as semiconductor die | Sep 13, 2010 | Issued |
Array
(
[id] => 7815235
[patent_doc_number] => 20120061855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/882067
[patent_app_country] => US
[patent_app_date] => 2010-09-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/882067 | Integrated circuit packaging system with film encapsulation and method of manufacture thereof | Sep 13, 2010 | Issued |
Array
(
[id] => 4644924
[patent_doc_number] => 08022531
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-20
[patent_title] => 'Integrated circuit package system using heat slug'
[patent_app_type] => utility
[patent_app_number] => 12/880415
[patent_app_country] => US
[patent_app_date] => 2010-09-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/880415 | Integrated circuit package system using heat slug | Sep 12, 2010 | Issued |
Array
(
[id] => 6327517
[patent_doc_number] => 20100327307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-30
[patent_title] => 'Optoelectronic Component'
[patent_app_type] => utility
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Array
(
[id] => 6004156
[patent_doc_number] => 20110057309
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[patent_kind] => A1
[patent_issue_date] => 2011-03-10
[patent_title] => 'STRUCTURE, METHOD AND SYSTEM FOR ASSESSING BONDING OF ELECTRODES IN FCB PACKAGING'
[patent_app_type] => utility
[patent_app_number] => 12/877661
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/877661 | Structure, method and system for assessing bonding of electrodes in FCB packaging | Sep 7, 2010 | Issued |
Array
(
[id] => 8283393
[patent_doc_number] => 08217492
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[patent_kind] => B2
[patent_issue_date] => 2012-07-10
[patent_title] => 'Inductively coupled integrated circuit with magnetic communication path and methods for use therewith'
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[patent_app_number] => 12/841108
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Array
(
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Array
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Array
(
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[patent_title] => 'Semiconductor device and method of manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/794505 | Semiconductor device and method of manufacturing the same | Jun 3, 2010 | Issued |