Search

Thanhnga B. Truong

Examiner (ID: 2062)

Most Active Art Unit
2438
Art Unit(s)
2435, 2135, 2438, 2498
Total Applications
886
Issued Applications
752
Pending Applications
24
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5407436 [patent_doc_number] => 20090121334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/266075 [patent_app_country] => US [patent_app_date] => 2008-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4173 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20090121334.pdf [firstpage_image] =>[orig_patent_app_number] => 12266075 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/266075
MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR APPARATUS Nov 5, 2008 Abandoned
Array ( [id] => 4644923 [patent_doc_number] => 08022530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Package substrate having electrically connecting structure' [patent_app_type] => utility [patent_app_number] => 12/265305 [patent_app_country] => US [patent_app_date] => 2008-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3059 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022530.pdf [firstpage_image] =>[orig_patent_app_number] => 12265305 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/265305
Package substrate having electrically connecting structure Nov 4, 2008 Issued
Array ( [id] => 5262340 [patent_doc_number] => 20090115025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/263522 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20090115025.pdf [firstpage_image] =>[orig_patent_app_number] => 12263522 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/263522
Semiconductor device and method for manufacturing the same Nov 2, 2008 Issued
Array ( [id] => 5561669 [patent_doc_number] => 20090134521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'INTEGRATED CIRCUIT AND MANUFACTURING METHOD OF COPPER GERMANIDE AND COPPER SILICIDE AS COPPER CAPPING LAYER' [patent_app_type] => utility [patent_app_number] => 12/264095 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6195 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20090134521.pdf [firstpage_image] =>[orig_patent_app_number] => 12264095 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/264095
Integrated circuit and manufacturing method of copper germanide and copper silicide as copper capping layer Nov 2, 2008 Issued
Array ( [id] => 7724674 [patent_doc_number] => 08097946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'Device mounting board, semiconductor module, and mobile device' [patent_app_type] => utility [patent_app_number] => 12/263174 [patent_app_country] => US [patent_app_date] => 2008-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 5335 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/097/08097946.pdf [firstpage_image] =>[orig_patent_app_number] => 12263174 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/263174
Device mounting board, semiconductor module, and mobile device Oct 30, 2008 Issued
Array ( [id] => 8200591 [patent_doc_number] => 08187908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Light-blocking layer sequence having one or more metal layers for an integrated circuit and method for the production of the layer sequence' [patent_app_type] => utility [patent_app_number] => 12/740554 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4517 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/187/08187908.pdf [firstpage_image] =>[orig_patent_app_number] => 12740554 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/740554
Light-blocking layer sequence having one or more metal layers for an integrated circuit and method for the production of the layer sequence Oct 29, 2008 Issued
Array ( [id] => 6304444 [patent_doc_number] => 20100109150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'METHOD OF ASSEMBLY OF A SEMICONDUCTOR PACKAGE FOR THE IMPROVEMENT OF THE ELECTRICAL TESTING YIELD ON THE PACKAGES SO OBTAINED' [patent_app_type] => utility [patent_app_number] => 12/261841 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5191 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109150.pdf [firstpage_image] =>[orig_patent_app_number] => 12261841 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/261841
Method of assembly of a semiconductor package for the improvement of the electrical testing yield on the packages so obtained Oct 29, 2008 Issued
Array ( [id] => 5337375 [patent_doc_number] => 20090053839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'HIGH POWER LED HOUSING AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/259696 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6474 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20090053839.pdf [firstpage_image] =>[orig_patent_app_number] => 12259696 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259696
High power LED housing and fabrication method thereof Oct 27, 2008 Issued
Array ( [id] => 7545933 [patent_doc_number] => 08053907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Method and system for forming conductive bumping with copper interconnection' [patent_app_type] => utility [patent_app_number] => 12/258956 [patent_app_country] => US [patent_app_date] => 2008-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5292 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053907.pdf [firstpage_image] =>[orig_patent_app_number] => 12258956 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/258956
Method and system for forming conductive bumping with copper interconnection Oct 26, 2008 Issued
Array ( [id] => 4629860 [patent_doc_number] => 08008758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-30 [patent_title] => 'Semiconductor device with increased I/O leadframe' [patent_app_type] => utility [patent_app_number] => 12/259096 [patent_app_country] => US [patent_app_date] => 2008-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 37 [patent_no_of_words] => 17807 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/008/08008758.pdf [firstpage_image] =>[orig_patent_app_number] => 12259096 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259096
Semiconductor device with increased I/O leadframe Oct 26, 2008 Issued
Array ( [id] => 8177013 [patent_doc_number] => 08178416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Method for making an electrically conducting mechanical interconnection member' [patent_app_type] => utility [patent_app_number] => 12/739848 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3842 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/178/08178416.pdf [firstpage_image] =>[orig_patent_app_number] => 12739848 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/739848
Method for making an electrically conducting mechanical interconnection member Oct 23, 2008 Issued
Array ( [id] => 8258125 [patent_doc_number] => 08207616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Adhesive film, dicing die bonding film and semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 12/738560 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 4760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12738560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/738560
Adhesive film, dicing die bonding film and semiconductor device using the same Oct 23, 2008 Issued
12/288756 Semiconductor package containig flip-chip arrangement and method of manufacturing the same Oct 22, 2008 Abandoned
Array ( [id] => 5582855 [patent_doc_number] => 20090102057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/255886 [patent_app_country] => US [patent_app_date] => 2008-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3804 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20090102057.pdf [firstpage_image] =>[orig_patent_app_number] => 12255886 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255886
Semiconductor device Oct 21, 2008 Issued
Array ( [id] => 4586635 [patent_doc_number] => 07851832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/255765 [patent_app_country] => US [patent_app_date] => 2008-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 8137 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/851/07851832.pdf [firstpage_image] =>[orig_patent_app_number] => 12255765 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255765
Semiconductor device Oct 21, 2008 Issued
Array ( [id] => 6216132 [patent_doc_number] => 20100052160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'BUMP STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/255416 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 2646 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052160.pdf [firstpage_image] =>[orig_patent_app_number] => 12255416 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255416
BUMP STRUCTURE AND METHOD FOR FABRICATING THE SAME Oct 20, 2008 Abandoned
Array ( [id] => 4487732 [patent_doc_number] => 07902669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/255052 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1410 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902669.pdf [firstpage_image] =>[orig_patent_app_number] => 12255052 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255052
Semiconductor device and method for manufacturing the same Oct 20, 2008 Issued
Array ( [id] => 4446009 [patent_doc_number] => 07863722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Stackable semiconductor assemblies and methods of manufacturing such assemblies' [patent_app_type] => utility [patent_app_number] => 12/254111 [patent_app_country] => US [patent_app_date] => 2008-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5239 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863722.pdf [firstpage_image] =>[orig_patent_app_number] => 12254111 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/254111
Stackable semiconductor assemblies and methods of manufacturing such assemblies Oct 19, 2008 Issued
Array ( [id] => 8555083 [patent_doc_number] => 08329555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Method for producing a capping wafer for a sensor' [patent_app_type] => utility [patent_app_number] => 12/734994 [patent_app_country] => US [patent_app_date] => 2008-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5400 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12734994 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/734994
Method for producing a capping wafer for a sensor Oct 19, 2008 Issued
Array ( [id] => 4597183 [patent_doc_number] => 07982305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-19 [patent_title] => 'Integrated circuit package including a three-dimensional fan-out / fan-in signal routing' [patent_app_type] => utility [patent_app_number] => 12/254535 [patent_app_country] => US [patent_app_date] => 2008-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3298 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/982/07982305.pdf [firstpage_image] =>[orig_patent_app_number] => 12254535 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/254535
Integrated circuit package including a three-dimensional fan-out / fan-in signal routing Oct 19, 2008 Issued
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