Thanhnga B. Truong

Array ( [id] => 7988949 [patent_doc_number] => 08076772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-13 [patent_title] => 'Printed circuit board, memory module having the same and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/146356 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 13423 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/076/08076772.pdf [firstpage_image] =>[orig_patent_app_number] => 12146356 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5419823 [patent_doc_number] => 20090146277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/145795 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7004 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146277.pdf [firstpage_image] =>[orig_patent_app_number] => 12145795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5461707 [patent_doc_number] => 20090321907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/146135 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20090321907.pdf [firstpage_image] =>[orig_patent_app_number] => 12146135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6311320 [patent_doc_number] => 20100193922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'Semiconductor chip package' [patent_app_type] => utility [patent_app_number] => 12/669151 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5676 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193922.pdf [firstpage_image] =>[orig_patent_app_number] => 12669151 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5395096 [patent_doc_number] => 20090315159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'LEADFRAMES HAVING BOTH ENHANCED-ADHESION AND SMOOTH SURFACES AND METHODS TO FORM THE SAME' [patent_app_type] => utility [patent_app_number] => 12/143415 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4955 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20090315159.pdf [firstpage_image] =>[orig_patent_app_number] => 12143415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 23312 [patent_doc_number] => 07800190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Getter on die in an upper sense plate designed system' [patent_app_type] => utility [patent_app_number] => 12/140006 [patent_app_country] => US [patent_app_date] => 2008-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1660 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800190.pdf [firstpage_image] =>[orig_patent_app_number] => 12140006 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5307584 [patent_doc_number] => 20090014865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'HEAT-CONDUCTIVE PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/136316 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20090014865.pdf [firstpage_image] =>[orig_patent_app_number] => 12136316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5364904 [patent_doc_number] => 20090302463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING SUBSTRATE WITH DIFFERENTIALLY PLATED COPPER AND SELECTIVE SOLDER' [patent_app_type] => utility [patent_app_number] => 12/136231 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6459 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302463.pdf [firstpage_image] =>[orig_patent_app_number] => 12136231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4503710 [patent_doc_number] => 07919851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-05 [patent_title] => 'Laminate substrate and semiconductor package utilizing the substrate' [patent_app_type] => utility [patent_app_number] => 12/133841 [patent_app_country] => US [patent_app_date] => 2008-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/919/07919851.pdf [firstpage_image] =>[orig_patent_app_number] => 12133841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4947021 [patent_doc_number] => 20080303147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'HIGH-FREQUENCY CIRCUIT DEVICE AND RADAR' [patent_app_type] => utility [patent_app_number] => 12/133916 [patent_app_country] => US [patent_app_date] => 2008-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8266 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20080303147.pdf [firstpage_image] =>[orig_patent_app_number] => 12133916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5319878 [patent_doc_number] => 20090057868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'Wafer Level Chip Size Package For MEMS Devices And Method For Fabricating The Same' [patent_app_type] => utility [patent_app_number] => 12/132641 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20090057868.pdf [firstpage_image] =>[orig_patent_app_number] => 12132641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4624791 [patent_doc_number] => 08004092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Semiconductor chip with post-passivation scheme formed over passivation layer' [patent_app_type] => utility [patent_app_number] => 12/132626 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 8830 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/004/08004092.pdf [firstpage_image] =>[orig_patent_app_number] => 12132626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5300309 [patent_doc_number] => 20090294961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/131541 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4481 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20090294961.pdf [firstpage_image] =>[orig_patent_app_number] => 12131541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4619659 [patent_doc_number] => 07999380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-16 [patent_title] => 'Process for manufacturing substrate with bumps and substrate structure' [patent_app_type] => utility [patent_app_number] => 12/129996 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 2795 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/999/07999380.pdf [firstpage_image] =>[orig_patent_app_number] => 12129996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8871171 [patent_doc_number] => 08466550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Semiconductor structure and a method of manufacturing a semiconductor structure' [patent_app_type] => utility [patent_app_number] => 12/994431 [patent_app_country] => US [patent_app_date] => 2008-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 28 [patent_no_of_words] => 5559 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12994431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5555594 [patent_doc_number] => 20090267171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'PRE-ENCAPSULATED CAVITY INTERPOSER' [patent_app_type] => utility [patent_app_number] => 12/128575 [patent_app_country] => US [patent_app_date] => 2008-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6973 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20090267171.pdf [firstpage_image] =>[orig_patent_app_number] => 12128575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4445931 [patent_doc_number] => 07863699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Bonded wafer package module' [patent_app_type] => utility [patent_app_number] => 12/124925 [patent_app_country] => US [patent_app_date] => 2008-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2887 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863699.pdf [firstpage_image] =>[orig_patent_app_number] => 12124925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5199 [patent_doc_number] => 07816788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Structure, method and system for assessing bonding of electrodes in FCB packaging' [patent_app_type] => utility [patent_app_number] => 12/122556 [patent_app_country] => US [patent_app_date] => 2008-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 5484 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/816/07816788.pdf [firstpage_image] =>[orig_patent_app_number] => 12122556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4532370 [patent_doc_number] => 07923793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Image sensor module and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 12/119611 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 6949 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/923/07923793.pdf [firstpage_image] =>[orig_patent_app_number] => 12119611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4435442 [patent_doc_number] => 07898087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Integrated chip carrier with compliant interconnects' [patent_app_type] => utility [patent_app_number] => 12/119805 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 35 [patent_no_of_words] => 2517 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/898/07898087.pdf [firstpage_image] =>[orig_patent_app_number] => 12119805 [rel_patent_id] =>[rel_patent_doc_number] =>)