
Thanhnga B. Truong
Examiner (ID: 2062)
| Most Active Art Unit | 2438 |
| Art Unit(s) | 2435, 2135, 2438, 2498 |
| Total Applications | 886 |
| Issued Applications | 752 |
| Pending Applications | 24 |
| Abandoned Applications | 114 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5123584
[patent_doc_number] => 20070235854
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH GROUND RING'
[patent_app_type] => utility
[patent_app_number] => 11/277991
[patent_app_country] => US
[patent_app_date] => 2006-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3721
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20070235854.pdf
[firstpage_image] =>[orig_patent_app_number] => 11277991
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/277991 | Integrated circuit package system with ground ring | Mar 29, 2006 | Issued |
Array
(
[id] => 5123610
[patent_doc_number] => 20070235880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/308492
[patent_app_country] => US
[patent_app_date] => 2006-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4613
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20070235880.pdf
[firstpage_image] =>[orig_patent_app_number] => 11308492
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/308492 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Mar 29, 2006 | Abandoned |
Array
(
[id] => 5123592
[patent_doc_number] => 20070235862
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'Hybrid flip-chip and wire-bond connection package system'
[patent_app_type] => utility
[patent_app_number] => 11/393301
[patent_app_country] => US
[patent_app_date] => 2006-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2045
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20070235862.pdf
[firstpage_image] =>[orig_patent_app_number] => 11393301
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/393301 | Hybrid flip-chip and wire-bond connection package system | Mar 28, 2006 | Abandoned |
Array
(
[id] => 5834797
[patent_doc_number] => 20060246628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Chipcard with contact areas and method for producing contact areas'
[patent_app_type] => utility
[patent_app_number] => 11/392451
[patent_app_country] => US
[patent_app_date] => 2006-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2172
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0246/20060246628.pdf
[firstpage_image] =>[orig_patent_app_number] => 11392451
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/392451 | Chipcard with contact areas and method for producing contact areas | Mar 28, 2006 | Issued |
Array
(
[id] => 4974796
[patent_doc_number] => 20070216026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'Aluminum bump bonding for fine aluminum wire'
[patent_app_type] => utility
[patent_app_number] => 11/385022
[patent_app_country] => US
[patent_app_date] => 2006-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1631
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0216/20070216026.pdf
[firstpage_image] =>[orig_patent_app_number] => 11385022
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/385022 | Aluminum bump bonding for fine aluminum wire | Mar 19, 2006 | Abandoned |
Array
(
[id] => 4974811
[patent_doc_number] => 20070216041
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'Fiducial scheme adapted for stacked integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/385941
[patent_app_country] => US
[patent_app_date] => 2006-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3456
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0216/20070216041.pdf
[firstpage_image] =>[orig_patent_app_number] => 11385941
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/385941 | Fiducial scheme adapted for stacked integrated circuits | Mar 19, 2006 | Issued |
Array
(
[id] => 5758569
[patent_doc_number] => 20060209514
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-21
[patent_title] => 'Semiconductor device and manufacturing method therefor'
[patent_app_type] => utility
[patent_app_number] => 11/377861
[patent_app_country] => US
[patent_app_date] => 2006-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4609
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0209/20060209514.pdf
[firstpage_image] =>[orig_patent_app_number] => 11377861
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/377861 | Semiconductor device and manufacturing method therefor | Mar 16, 2006 | Abandoned |
Array
(
[id] => 5754080
[patent_doc_number] => 20060223229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-05
[patent_title] => 'Ball grid array package and process for manufacturing same'
[patent_app_type] => utility
[patent_app_number] => 11/377425
[patent_app_country] => US
[patent_app_date] => 2006-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 4073
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0223/20060223229.pdf
[firstpage_image] =>[orig_patent_app_number] => 11377425
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/377425 | Ball grid array package and process for manufacturing same | Mar 16, 2006 | Abandoned |
Array
(
[id] => 5697468
[patent_doc_number] => 20060214152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-28
[patent_title] => 'Light emitting device'
[patent_app_type] => utility
[patent_app_number] => 11/376842
[patent_app_country] => US
[patent_app_date] => 2006-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 21597
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0214/20060214152.pdf
[firstpage_image] =>[orig_patent_app_number] => 11376842
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/376842 | Light emitting device | Mar 15, 2006 | Issued |
Array
(
[id] => 5256812
[patent_doc_number] => 20070210444
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Methods of promoting adhesion between transfer molded ic packages and injection molded plastics for creating over-molded memory cards'
[patent_app_type] => utility
[patent_app_number] => 11/373941
[patent_app_country] => US
[patent_app_date] => 2006-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5110
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20070210444.pdf
[firstpage_image] =>[orig_patent_app_number] => 11373941
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/373941 | Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards | Mar 12, 2006 | Issued |
Array
(
[id] => 5256815
[patent_doc_number] => 20070210447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Elongated fasteners for securing together electronic components and substrates, semiconductor device assemblies including such fasteners, and accompanying systems and methods'
[patent_app_type] => utility
[patent_app_number] => 11/369571
[patent_app_country] => US
[patent_app_date] => 2006-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 10314
[patent_no_of_claims] => 90
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20070210447.pdf
[firstpage_image] =>[orig_patent_app_number] => 11369571
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/369571 | Elongated fasteners for securing together electronic components and substrates, semiconductor device assemblies including such fasteners, and accompanying systems | Mar 6, 2006 | Issued |
Array
(
[id] => 163252
[patent_doc_number] => 07671458
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Connecting member used for semiconductor device including plurality of arranged semiconductor modules and semiconductor device provided with the same'
[patent_app_type] => utility
[patent_app_number] => 11/367272
[patent_app_country] => US
[patent_app_date] => 2006-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 6898
[patent_no_of_claims] => 10
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[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/671/07671458.pdf
[firstpage_image] =>[orig_patent_app_number] => 11367272
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/367272 | Connecting member used for semiconductor device including plurality of arranged semiconductor modules and semiconductor device provided with the same | Mar 5, 2006 | Issued |
Array
(
[id] => 7592840
[patent_doc_number] => 07652361
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-01-26
[patent_title] => 'Land patterns for a semiconductor stacking structure and method therefor'
[patent_app_type] => utility
[patent_app_number] => 11/367171
[patent_app_country] => US
[patent_app_date] => 2006-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2413
[patent_no_of_claims] => 16
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/652/07652361.pdf
[firstpage_image] =>[orig_patent_app_number] => 11367171
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/367171 | Land patterns for a semiconductor stacking structure and method therefor | Mar 2, 2006 | Issued |
Array
(
[id] => 4983078
[patent_doc_number] => 20070087636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-19
[patent_title] => 'Contact member, connector, substrate and contact system'
[patent_app_type] => utility
[patent_app_number] => 11/362837
[patent_app_country] => US
[patent_app_date] => 2006-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3950
[patent_no_of_claims] => 6
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[pdf_file] => publications/A1/0087/20070087636.pdf
[firstpage_image] =>[orig_patent_app_number] => 11362837
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/362837 | Contact member, connector, substrate and contact system | Feb 27, 2006 | Abandoned |
Array
(
[id] => 160238
[patent_doc_number] => 07675180
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-03-09
[patent_title] => 'Stacked electronic component package having film-on-wire spacer'
[patent_app_type] => utility
[patent_app_number] => 11/356921
[patent_app_country] => US
[patent_app_date] => 2006-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/675/07675180.pdf
[firstpage_image] =>[orig_patent_app_number] => 11356921
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/356921 | Stacked electronic component package having film-on-wire spacer | Feb 16, 2006 | Issued |
Array
(
[id] => 289357
[patent_doc_number] => 07547973
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-16
[patent_title] => 'Tamper-resistant semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/354331
[patent_app_country] => US
[patent_app_date] => 2006-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 5722
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/547/07547973.pdf
[firstpage_image] =>[orig_patent_app_number] => 11354331
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/354331 | Tamper-resistant semiconductor device | Feb 14, 2006 | Issued |
Array
(
[id] => 315229
[patent_doc_number] => 07525201
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-28
[patent_title] => 'Semiconductor chip having solder bumps and dummy bumps'
[patent_app_type] => utility
[patent_app_number] => 11/352352
[patent_app_country] => US
[patent_app_date] => 2006-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3472
[patent_no_of_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/525/07525201.pdf
[firstpage_image] =>[orig_patent_app_number] => 11352352
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/352352 | Semiconductor chip having solder bumps and dummy bumps | Feb 12, 2006 | Issued |
Array
(
[id] => 338369
[patent_doc_number] => 07504714
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-17
[patent_title] => 'Chip package with asymmetric molding'
[patent_app_type] => utility
[patent_app_number] => 11/351651
[patent_app_country] => US
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[pdf_file] => patents/07/504/07504714.pdf
[firstpage_image] =>[orig_patent_app_number] => 11351651
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/351651 | Chip package with asymmetric molding | Feb 9, 2006 | Issued |
Array
(
[id] => 256739
[patent_doc_number] => 07576416
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Chip package having with asymmetric molding and turbulent plate downset design'
[patent_app_type] => utility
[patent_app_number] => 11/352001
[patent_app_country] => US
[patent_app_date] => 2006-02-10
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[pdf_file] => patents/07/576/07576416.pdf
[firstpage_image] =>[orig_patent_app_number] => 11352001
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/352001 | Chip package having with asymmetric molding and turbulent plate downset design | Feb 9, 2006 | Issued |
Array
(
[id] => 75321
[patent_doc_number] => 07750482
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-06
[patent_title] => 'Integrated circuit package system including zero fillet resin'
[patent_app_type] => utility
[patent_app_number] => 11/307482
[patent_app_country] => US
[patent_app_date] => 2006-02-09
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 2593
[patent_no_of_claims] => 20
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[patent_words_short_claim] => 87
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/750/07750482.pdf
[firstpage_image] =>[orig_patent_app_number] => 11307482
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/307482 | Integrated circuit package system including zero fillet resin | Feb 8, 2006 | Issued |