
Tha-o H. Bui
Examiner (ID: 4699, Phone: (571)270-7357 , Office: P/2825 )
| Most Active Art Unit | 2825 |
| Art Unit(s) | 2825, 4134, 2824 |
| Total Applications | 1210 |
| Issued Applications | 1019 |
| Pending Applications | 94 |
| Abandoned Applications | 122 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19454892
[patent_doc_number] => 20240315022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => MEMORY DEVICE AND STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/452573
[patent_app_country] => US
[patent_app_date] => 2023-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11400
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452573
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/452573 | Memory device and storage device storing data based on information of memory cells | Aug 20, 2023 | Issued |
Array
(
[id] => 19406883
[patent_doc_number] => 20240290394
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => MEMORY DEVICE FOR PERFORMING READ OPERATION
[patent_app_type] => utility
[patent_app_number] => 18/453113
[patent_app_country] => US
[patent_app_date] => 2023-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10205
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18453113
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/453113 | Memory device for performing read operation | Aug 20, 2023 | Issued |
Array
(
[id] => 20359942
[patent_doc_number] => 12475946
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => Memory devices with a lower effective program verify level
[patent_app_type] => utility
[patent_app_number] => 18/234429
[patent_app_country] => US
[patent_app_date] => 2023-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 23
[patent_no_of_words] => 6741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234429
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/234429 | Memory devices with a lower effective program verify level | Aug 15, 2023 | Issued |
Array
(
[id] => 19022898
[patent_doc_number] => 20240079069
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => OPERATION METHOD OF MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/450053
[patent_app_country] => US
[patent_app_date] => 2023-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19895
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450053
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/450053 | OPERATION METHOD OF MEMORY DEVICE | Aug 14, 2023 | Pending |
Array
(
[id] => 18812242
[patent_doc_number] => 20230386579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => THREE-DIMENSIONAL ONE TIME PROGRAMMABLE MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/232539
[patent_app_country] => US
[patent_app_date] => 2023-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7147
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 17
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232539
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/232539 | THREE-DIMENSIONAL ONE TIME PROGRAMMABLE MEMORY | Aug 9, 2023 | Pending |
Array
(
[id] => 19740959
[patent_doc_number] => 12217798
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-04
[patent_title] => Bank design with differential bulk bias in eFuse array
[patent_app_type] => utility
[patent_app_number] => 18/362198
[patent_app_country] => US
[patent_app_date] => 2023-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8005
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362198
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/362198 | Bank design with differential bulk bias in eFuse array | Jul 30, 2023 | Issued |
Array
(
[id] => 20345820
[patent_doc_number] => 12469555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-11
[patent_title] => Unselect word line switch bias scheme for non-volatile memory apparatus
[patent_app_type] => utility
[patent_app_number] => 18/228088
[patent_app_country] => US
[patent_app_date] => 2023-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 8162
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228088
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/228088 | Unselect word line switch bias scheme for non-volatile memory apparatus | Jul 30, 2023 | Issued |
Array
(
[id] => 18743106
[patent_doc_number] => 20230352094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => MEMORY DEVICE AND PROGRAM OPERATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/220681
[patent_app_country] => US
[patent_app_date] => 2023-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11743
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220681
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/220681 | MEMORY DEVICE AND PROGRAM OPERATION THEREOF | Jul 10, 2023 | Pending |
Array
(
[id] => 18711352
[patent_doc_number] => 20230333981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => MEMORY CIRCUIT AND CACHE CIRCUIT CONFIGURATION
[patent_app_type] => utility
[patent_app_number] => 18/341088
[patent_app_country] => US
[patent_app_date] => 2023-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4695
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341088
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/341088 | Memory circuit and cache circuit configuration | Jun 25, 2023 | Issued |
Array
(
[id] => 19670633
[patent_doc_number] => 12183400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-31
[patent_title] => Three dimensional stacked nonvolatile semiconductor memory having a controller configured to execute a program operation on memory cells
[patent_app_type] => utility
[patent_app_number] => 18/340977
[patent_app_country] => US
[patent_app_date] => 2023-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 28
[patent_no_of_words] => 9806
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340977
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/340977 | Three dimensional stacked nonvolatile semiconductor memory having a controller configured to execute a program operation on memory cells | Jun 25, 2023 | Issued |
Array
(
[id] => 19660424
[patent_doc_number] => 20240427489
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/338153
[patent_app_country] => US
[patent_app_date] => 2023-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8809
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338153
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/338153 | Semiconductor device | Jun 19, 2023 | Issued |
Array
(
[id] => 20455777
[patent_doc_number] => 12518837
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-06
[patent_title] => Memory device including precharge voltage control and method of operating the memory device
[patent_app_type] => utility
[patent_app_number] => 18/323306
[patent_app_country] => US
[patent_app_date] => 2023-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 7908
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323306
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/323306 | Memory device including precharge voltage control and method of operating the memory device | May 23, 2023 | Issued |
Array
(
[id] => 18615547
[patent_doc_number] => 20230282284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-07
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/315703
[patent_app_country] => US
[patent_app_date] => 2023-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6628
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18315703
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/315703 | Semiconductor devices | May 10, 2023 | Issued |
Array
(
[id] => 19414526
[patent_doc_number] => 12080360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-03
[patent_title] => Reducing programming disturbance in memory devices
[patent_app_type] => utility
[patent_app_number] => 18/195181
[patent_app_country] => US
[patent_app_date] => 2023-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5592
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195181
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/195181 | Reducing programming disturbance in memory devices | May 8, 2023 | Issued |
Array
(
[id] => 18599983
[patent_doc_number] => 20230274784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-31
[patent_title] => METHOD OF CONTROLLING A SEMICONDUCTOR MEMORY INCLUDING MEMORY CELLS AND A WORD LINE
[patent_app_type] => utility
[patent_app_number] => 18/312696
[patent_app_country] => US
[patent_app_date] => 2023-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24794
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312696
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/312696 | Memory system including semiconductor memory and controller capable of determining necessary shifted boundary read voltages in a short period of time | May 4, 2023 | Issued |
Array
(
[id] => 19168258
[patent_doc_number] => 11984169
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-14
[patent_title] => Piecewise linear and trimmable temperature sensor
[patent_app_type] => utility
[patent_app_number] => 18/142423
[patent_app_country] => US
[patent_app_date] => 2023-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 8424
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142423
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/142423 | Piecewise linear and trimmable temperature sensor | May 1, 2023 | Issued |
Array
(
[id] => 20507902
[patent_doc_number] => 12542184
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-03
[patent_title] => Memory device including initial charging phase for double sense operation
[patent_app_type] => utility
[patent_app_number] => 18/141136
[patent_app_country] => US
[patent_app_date] => 2023-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 10044
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141136
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/141136 | MEMORY DEVICE INCLUDING INITIAL CHARGING PHASE FOR DOUBLE SENSE OPERATION | Apr 27, 2023 | Pending |
Array
(
[id] => 20416657
[patent_doc_number] => 12499947
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-16
[patent_title] => Memory device for performing foggy-fine program operation and method of operating the memory device
[patent_app_type] => utility
[patent_app_number] => 18/300958
[patent_app_country] => US
[patent_app_date] => 2023-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 21
[patent_no_of_words] => 7062
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18300958
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/300958 | Memory device for performing foggy-fine program operation and method of operating the memory device | Apr 13, 2023 | Issued |
Array
(
[id] => 18712533
[patent_doc_number] => 20230335166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => MEMORY DEVICES HAVING SPECIAL MODE ACCESS
[patent_app_type] => utility
[patent_app_number] => 18/134318
[patent_app_country] => US
[patent_app_date] => 2023-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5187
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134318
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/134318 | MEMORY DEVICES HAVING SPECIAL MODE ACCESS | Apr 12, 2023 | Pending |
Array
(
[id] => 20484191
[patent_doc_number] => 12532672
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-20
[patent_title] => Semiconductor device including shield layer
[patent_app_type] => utility
[patent_app_number] => 18/193336
[patent_app_country] => US
[patent_app_date] => 2023-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 31
[patent_no_of_words] => 8407
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193336
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/193336 | Semiconductor device including shield layer | Mar 29, 2023 | Issued |