Search

Tha-o H. Bui

Examiner (ID: 4699, Phone: (571)270-7357 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825, 4134, 2824
Total Applications
1210
Issued Applications
1019
Pending Applications
94
Abandoned Applications
122

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20189573 [patent_doc_number] => 12400695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Semiconductor memory with adjustment circuit and method for controlling a semiconductor memory [patent_app_type] => utility [patent_app_number] => 18/192294 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 1307 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192294 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/192294
Semiconductor memory with adjustment circuit and method for controlling a semiconductor memory Mar 28, 2023 Issued
Array ( [id] => 18661033 [patent_doc_number] => 20230307046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => QUANTUM INFORMATION STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/188684 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188684 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188684
Quantum information storage device Mar 22, 2023 Issued
Array ( [id] => 19467700 [patent_doc_number] => 20240321370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SECURE ANTI-FUSE ONE TIME PROGRAMMABLE BIT CELL DESIGN [patent_app_type] => utility [patent_app_number] => 18/187993 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18187993 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/187993
SECURE ANTI-FUSE ONE TIME PROGRAMMABLE BIT CELL DESIGN Mar 21, 2023 Pending
Array ( [id] => 19918409 [patent_doc_number] => 12293782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Convertible memory device [patent_app_type] => utility [patent_app_number] => 18/186960 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 8304 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186960
Convertible memory device Mar 20, 2023 Issued
Array ( [id] => 20229160 [patent_doc_number] => 12417814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Storage device for backing up state group data in the event of a sudden power-off and program method thereof [patent_app_type] => utility [patent_app_number] => 18/186480 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4801 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186480
Storage device for backing up state group data in the event of a sudden power-off and program method thereof Mar 19, 2023 Issued
Array ( [id] => 18696106 [patent_doc_number] => 20230326537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/122928 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18122928 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/122928
Memory device, memory system, and method for multi-pass programming thereof to reduce programming time Mar 16, 2023 Issued
Array ( [id] => 20441297 [patent_doc_number] => 12512137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Multilayered vertical spin-orbit torque devices [patent_app_type] => utility [patent_app_number] => 18/185961 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185961
Multilayered vertical spin-orbit torque devices Mar 16, 2023 Issued
Array ( [id] => 18661055 [patent_doc_number] => 20230307068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => VOLTAGE GENERATOR AND MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/184842 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13058 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184842 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184842
Voltage generator and memory device including the same Mar 15, 2023 Issued
Array ( [id] => 18532995 [patent_doc_number] => 20230238070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/121466 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121466 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121466
Semiconductor device for writing to a storage element Mar 13, 2023 Issued
Array ( [id] => 19886673 [patent_doc_number] => 12272397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Forming operation method of resistive random access memory [patent_app_type] => utility [patent_app_number] => 18/180864 [patent_app_country] => US [patent_app_date] => 2023-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4119 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18180864 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/180864
Forming operation method of resistive random access memory Mar 8, 2023 Issued
Array ( [id] => 20080604 [patent_doc_number] => 12354679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Memory system for performing an erase voltage application operation and an erase verify operation for a nonvolatile memory [patent_app_type] => utility [patent_app_number] => 18/179505 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 11260 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179505 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179505
Memory system for performing an erase voltage application operation and an erase verify operation for a nonvolatile memory Mar 6, 2023 Issued
Array ( [id] => 18531911 [patent_doc_number] => 20230236983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => APPARATUSES AND METHODS FOR COMPUTE ENABLED CACHE [patent_app_type] => utility [patent_app_number] => 18/117974 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/117974
Apparatuses and methods for compute enabled cache Mar 5, 2023 Issued
Array ( [id] => 19037842 [patent_doc_number] => 20240087657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => MEMORY SYSTEM AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/179310 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179310 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179310
Memory system and control method to save data after a power disable request Mar 5, 2023 Issued
Array ( [id] => 19980031 [patent_doc_number] => 12347517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Pipe register and semiconductor apparatus including the pipe register [patent_app_type] => utility [patent_app_number] => 18/115999 [patent_app_country] => US [patent_app_date] => 2023-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115999 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/115999
Pipe register and semiconductor apparatus including the pipe register Feb 28, 2023 Issued
Array ( [id] => 19886684 [patent_doc_number] => 12272409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Flash memory device for adjusting trip voltage using voltage regulator and sensing method thereof [patent_app_type] => utility [patent_app_number] => 18/176347 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176347 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/176347
Flash memory device for adjusting trip voltage using voltage regulator and sensing method thereof Feb 27, 2023 Issued
Array ( [id] => 20111285 [patent_doc_number] => 12362020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Semiconductor memory device having a control circuit for changing a drive capability of an output circuit of the semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/176442 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 14655 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/176442
Semiconductor memory device having a control circuit for changing a drive capability of an output circuit of the semiconductor memory device Feb 27, 2023 Issued
Array ( [id] => 18488151 [patent_doc_number] => 20230215499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/175043 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175043 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/175043
Nonvolatile memory device including a logic circuit to control word and bitline voltages Feb 26, 2023 Issued
Array ( [id] => 20132077 [patent_doc_number] => 12374394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Degradation-aware training scheme for reliable memristor deep learning accelerator design [patent_app_type] => utility [patent_app_number] => 18/173242 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173242 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/173242
Degradation-aware training scheme for reliable memristor deep learning accelerator design Feb 22, 2023 Issued
Array ( [id] => 18652840 [patent_doc_number] => 20230298680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => APPARATUS AND METHODS FOR PERFORMING SUCCESSIVE ARRAY OPERATIONS IN A MEMORY [patent_app_type] => utility [patent_app_number] => 18/110489 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110489
Memories for performing successive programming operations Feb 15, 2023 Issued
Array ( [id] => 19054469 [patent_doc_number] => 20240096438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A DRAM DEVICE [patent_app_type] => utility [patent_app_number] => 18/169610 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18169610 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/169610
Error detection, correction, and media management on a dram device Feb 14, 2023 Issued
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