
Thao P. Le
Examiner (ID: 9374)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2401 |
| Issued Applications | 2209 |
| Pending Applications | 77 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20161403
[patent_doc_number] => 12388039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => 3D IC comprising semiconductor substrates with different bandgaps
[patent_app_type] => utility
[patent_app_number] => 17/848815
[patent_app_country] => US
[patent_app_date] => 2022-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 53
[patent_no_of_words] => 11296
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848815
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/848815 | 3D IC comprising semiconductor substrates with different bandgaps | Jun 23, 2022 | Issued |
Array
(
[id] => 17917919
[patent_doc_number] => 20220320315
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/848378
[patent_app_country] => US
[patent_app_date] => 2022-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6359
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848378
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/848378 | Method of manufacturing semiconductor device | Jun 22, 2022 | Issued |
Array
(
[id] => 18919186
[patent_doc_number] => 11881475
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-23
[patent_title] => Modules with integrated circuits and devices
[patent_app_type] => utility
[patent_app_number] => 17/846720
[patent_app_country] => US
[patent_app_date] => 2022-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 68
[patent_figures_cnt] => 108
[patent_no_of_words] => 30836
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846720
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/846720 | Modules with integrated circuits and devices | Jun 21, 2022 | Issued |
Array
(
[id] => 19597039
[patent_doc_number] => 12154893
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-26
[patent_title] => Base structures for microelectronic devices
[patent_app_type] => utility
[patent_app_number] => 17/806895
[patent_app_country] => US
[patent_app_date] => 2022-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 21
[patent_no_of_words] => 12851
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806895
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/806895 | Base structures for microelectronic devices | Jun 13, 2022 | Issued |
Array
(
[id] => 18821235
[patent_doc_number] => 20230395576
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => MEMORY ON PACKAGE (MOP) ARCHITECTURE
[patent_app_type] => utility
[patent_app_number] => 17/833589
[patent_app_country] => US
[patent_app_date] => 2022-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6160
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833589
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/833589 | MEMORY ON PACKAGE (MOP) ARCHITECTURE | Jun 5, 2022 | Pending |
Array
(
[id] => 17855269
[patent_doc_number] => 20220285312
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/804110
[patent_app_country] => US
[patent_app_date] => 2022-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13198
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804110
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/804110 | Semiconductor package | May 25, 2022 | Issued |
Array
(
[id] => 17855292
[patent_doc_number] => 20220285335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => METHODS OF MANUFACTURING LIGHT-EMITTING DEVICES WITH METAL INLAYS AND BOTTOM CONTACTS
[patent_app_type] => utility
[patent_app_number] => 17/824620
[patent_app_country] => US
[patent_app_date] => 2022-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9124
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824620
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/824620 | Methods of manufacturing light-emitting devices with metal inlays and bottom contacts | May 24, 2022 | Issued |
Array
(
[id] => 17855279
[patent_doc_number] => 20220285322
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS
[patent_app_type] => utility
[patent_app_number] => 17/750338
[patent_app_country] => US
[patent_app_date] => 2022-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21140
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750338
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/750338 | 3D semiconductor device and structure with metal layers | May 20, 2022 | Issued |
Array
(
[id] => 18891026
[patent_doc_number] => 11869803
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Single crystalline silicon stack formation and bonding to a CMOS wafer
[patent_app_type] => utility
[patent_app_number] => 17/749282
[patent_app_country] => US
[patent_app_date] => 2022-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11472
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749282
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/749282 | Single crystalline silicon stack formation and bonding to a CMOS wafer | May 19, 2022 | Issued |
Array
(
[id] => 17840773
[patent_doc_number] => 20220278079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-01
[patent_title] => SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR CHIP
[patent_app_type] => utility
[patent_app_number] => 17/748164
[patent_app_country] => US
[patent_app_date] => 2022-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12418
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17748164
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/748164 | Semiconductor chip, semiconductor device, and semiconductor package including the semiconductor chip | May 18, 2022 | Issued |
Array
(
[id] => 17840772
[patent_doc_number] => 20220278078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-01
[patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH HEAT DISSIPATION FEATURES
[patent_app_type] => utility
[patent_app_number] => 17/746030
[patent_app_country] => US
[patent_app_date] => 2022-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9781
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746030
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/746030 | Method for fabricating semiconductor device with heat dissipation features | May 16, 2022 | Issued |
Array
(
[id] => 20302552
[patent_doc_number] => 12448530
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-21
[patent_title] => Ink composition, light emitting diode, and method for manufacturing light emitting diode
[patent_app_type] => utility
[patent_app_number] => 17/745387
[patent_app_country] => US
[patent_app_date] => 2022-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 9271
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17745387
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/745387 | Ink composition, light emitting diode, and method for manufacturing light emitting diode | May 15, 2022 | Issued |
Array
(
[id] => 17840919
[patent_doc_number] => 20220278225
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-01
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/744722
[patent_app_country] => US
[patent_app_date] => 2022-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3282
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744722
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/744722 | Semiconductor device and method for fabricating the same | May 14, 2022 | Issued |
Array
(
[id] => 18774458
[patent_doc_number] => 20230369289
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => DIE STACKING PACKAGE ARCHITECTURE FOR HIGH-SPEED INPUT/OUTPUT WITH THROUGH-DIELECTRIC VIAS
[patent_app_type] => utility
[patent_app_number] => 17/742799
[patent_app_country] => US
[patent_app_date] => 2022-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17474
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742799
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/742799 | DIE STACKING PACKAGE ARCHITECTURE FOR HIGH-SPEED INPUT/OUTPUT WITH THROUGH-DIELECTRIC VIAS | May 11, 2022 | Pending |
Array
(
[id] => 17840830
[patent_doc_number] => 20220278136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-01
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/742432
[patent_app_country] => US
[patent_app_date] => 2022-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26891
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742432
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/742432 | Semiconductor device and method for manufacturing the same | May 11, 2022 | Issued |
Array
(
[id] => 18774401
[patent_doc_number] => 20230369232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => MOLDED INTERCONNECT MEMORY ON PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/741988
[patent_app_country] => US
[patent_app_date] => 2022-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6467
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741988
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/741988 | MOLDED INTERCONNECT MEMORY ON PACKAGE | May 10, 2022 | Pending |
Array
(
[id] => 18983695
[patent_doc_number] => 11908885
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Semiconductor device structure with magnetic element
[patent_app_type] => utility
[patent_app_number] => 17/739487
[patent_app_country] => US
[patent_app_date] => 2022-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 4973
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739487
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/739487 | Semiconductor device structure with magnetic element | May 8, 2022 | Issued |
Array
(
[id] => 19812386
[patent_doc_number] => 12243799
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-04
[patent_title] => Electronic packages with integral heat spreaders
[patent_app_type] => utility
[patent_app_number] => 17/738989
[patent_app_country] => US
[patent_app_date] => 2022-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 6264
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738989
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/738989 | Electronic packages with integral heat spreaders | May 5, 2022 | Issued |
Array
(
[id] => 17795629
[patent_doc_number] => 20220254721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-11
[patent_title] => HYBRID FAN-OUT ARCHITECTURE WITH EMIB AND GLASS CORE FOR HETEROGENEOUS DIE INTEGRATION APPLICATIONS
[patent_app_type] => utility
[patent_app_number] => 17/732365
[patent_app_country] => US
[patent_app_date] => 2022-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7842
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 278
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17732365
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/732365 | Hybrid fan-out architecture with EMIB and glass core for heterogeneous die integration applications | Apr 27, 2022 | Issued |
Array
(
[id] => 19533979
[patent_doc_number] => 20240357881
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => DISPLAY SUBSTRATE AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/255277
[patent_app_country] => US
[patent_app_date] => 2022-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16982
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18255277
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/255277 | DISPLAY SUBSTRATE AND DISPLAY DEVICE | Apr 26, 2022 | Pending |